arch/arm/mach-omap2/vc.c

   1 #include <linux/kernel.h>
   2 #include <linux/delay.h>
   3 #include <linux/init.h>
   4 #include <linux/clk.h>
   5
   6 #include <plat/cpu.h>
   7
   8 #include "voltage.h"
   9 #include "vc.h"
  10 #include "prm-regbits-34xx.h"
  11 #include "prm-regbits-44xx.h"
  12 #include "prm44xx.h"
  13
  14 #define OMAP_VC_I2C_ACK_DELAY 3
  15
  16 /**
  17  * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
  18  * @sa: bit for slave address
  19  * @rav: bit for voltage configuration register
  20  * @rac: bit for command configuration register
  21  * @racen: enable bit for RAC
  22  * @cmd: bit for command value set selection
  23  *
  24  * Channel configuration bits, common for OMAP3+
  25  * OMAP3 register: PRM_VC_CH_CONF
  26  * OMAP4 register: PRM_VC_CFG_CHANNEL
  27  * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG
  28  */
  29 struct omap_vc_channel_cfg {
  30         u8 sa;
  31         u8 rav;
  32         u8 rac;
  33         u8 racen;
  34         u8 cmd;
  35 };
  36
  37 static struct omap_vc_channel_cfg vc_default_channel_cfg = {
  38         .sa    = BIT(0),
  39         .rav   = BIT(1),
  40         .rac   = BIT(2),
  41         .racen = BIT(3),
  42         .cmd   = BIT(4),
  43 };
  44
  45 /*
  46  * On OMAP3+, all VC channels have the above default bitfield
  47  * configuration, except the OMAP4 MPU channel.  This appears
  48  * to be a freak accident as every other VC channel has the
  49  * default configuration, thus creating a mutant channel config.
  50  */
  51 static struct omap_vc_channel_cfg vc_mutant_channel_cfg = {
  52         .sa    = BIT(0),
  53         .rav   = BIT(2),
  54         .rac   = BIT(3),
  55         .racen = BIT(4),
  56         .cmd   = BIT(1),
  57 };
  58
  59 static struct omap_vc_channel_cfg *vc_cfg_bits;
  60 #define CFG_CHANNEL_MASK 0x1f
  61
  62 /**
  63  * omap_vc_config_channel - configure VC channel to PMIC mappings
  64  * @voltdm: pointer to voltagdomain defining the desired VC channel
  65  *
  66  * Configures the VC channel to PMIC mappings for the following
  67  * PMIC settings
  68  * - i2c slave address (SA)
  69  * - voltage configuration address (RAV)
  70  * - command configuration address (RAC) and enable bit (RACEN)
  71  * - command values for ON, ONLP, RET and OFF (CMD)
  72  *
  73  * This function currently only allows flexible configuration of the
  74  * non-default channel.  Starting with OMAP4, there are more than 2
  75  * channels, with one defined as the default (on OMAP4, it's MPU.)
  76  * Only the non-default channel can be configured.
  77  */
  78 static int omap_vc_config_channel(struct voltagedomain *voltdm)
  79 {
  80         struct omap_vc_channel *vc = voltdm->vc;
  81
  82         /*
  83          * For default channel, the only configurable bit is RACEN.
  84          * All others must stay at zero (see function comment above.)
  85          */
  86         if (vc->flags & OMAP_VC_CHANNEL_DEFAULT)
  87                 vc->cfg_channel &= vc_cfg_bits->racen;
  88
  89         voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
  90                     vc->cfg_channel << vc->cfg_channel_sa_shift,
  91                     vc->common->cfg_channel_reg);
  92
  93         return 0;
  94 }
  95
  96 /* Voltage scale and accessory APIs */
  97 int omap_vc_pre_scale(struct voltagedomain *voltdm,
  98                       unsigned long target_volt,
  99                       struct omap_volt_data *target_v,
 100                       u8 *target_vsel, u8 *current_vsel)
 101 {
 102         struct omap_vc_channel *vc = voltdm->vc;
 103         u32 vc_cmdval;
 104
 105         /* Check if sufficient pmic info is available for this vdd */
 106         if (!voltdm->pmic) {
 107                 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
 108                         __func__, voltdm->name);
 109                 return -EINVAL;
 110         }
 111
 112         if (!voltdm->pmic->uv_to_vsel) {
 113                 pr_err("%s: PMIC function to convert voltage in uV to"
 114                         "vsel not registered. Hence unable to scale voltage"
 115                         "for vdd_%s\n", __func__, voltdm->name);
 116                 return -ENODATA;
 117         }
 118
 119         if (!voltdm->read || !voltdm->write) {
 120                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 121                         __func__, voltdm->name);
 122                 return -EINVAL;
 123         }
 124
 125         *target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
 126         *current_vsel = voltdm->read(voltdm->vp->voltage);
 127
 128         /* Setting the ON voltage to the new target voltage */
 129         vc_cmdval = voltdm->read(vc->cmdval_reg);
 130         vc_cmdval &= ~vc->common->cmd_on_mask;
 131         vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
 132         voltdm->write(vc_cmdval, vc->cmdval_reg);
 133
 134         omap_vp_update_errorgain(voltdm, target_v);
 135
 136         return 0;
 137 }
 138
 139 /**
 140  * omap_vc_set_auto_trans() - set auto transition parameters for a domain
 141  * @voltdm:     voltage domain we are interested in
 142  * @flag:       which state should we program this to
 143  */
 144 int omap_vc_set_auto_trans(struct voltagedomain *voltdm, u8 flag)
 145 {
 146         struct omap_vc_channel *vc;
 147         const struct omap_vc_auto_trans *auto_trans;
 148         u8 val = OMAP_VC_CHANNEL_AUTO_TRANSITION_UNSUPPORTED;
 149
 150         if (!voltdm) {
 151                 pr_err("%s: NULL Voltage domain!\n", __func__);
 152                 return -ENOENT;
 153         }
 154         vc = voltdm->vc;
 155         if (!vc) {
 156                 pr_err("%s: NULL VC Voltage domain %s!\n", __func__,
 157                        voltdm->name);
 158                 return -ENOENT;
 159         }
 160
 161         auto_trans = vc->auto_trans;
 162         if (!auto_trans) {
 163                 pr_debug("%s: No auto trans %s!\n", __func__, voltdm->name);
 164                 return 0;
 165         }
 166
 167         /* Handle value and masks per silicon data */
 168         switch (flag) {
 169         case OMAP_VC_CHANNEL_AUTO_TRANSITION_DISABLE:
 170                 val = 0x0;
 171                 break;
 172         case OMAP_VC_CHANNEL_AUTO_TRANSITION_SLEEP:
 173                 val = auto_trans->sleep_val;
 174                 break;
 175         case OMAP_VC_CHANNEL_AUTO_TRANSITION_RETENTION:
 176                 val = auto_trans->retention_val;
 177                 break;
 178         case OMAP_VC_CHANNEL_AUTO_TRANSITION_OFF:
 179                 val = auto_trans->off_val;
 180                 break;
 181         default:
 182                 pr_err("%s: Voltdm %s invalid flag %d\n", __func__,
 183                        voltdm->name, flag);
 184                 return -EINVAL;
 185         }
 186
 187         if (val == OMAP_VC_CHANNEL_AUTO_TRANSITION_UNSUPPORTED) {
 188                 pr_err("%s: transition to %d on %s is NOT supported\n",
 189                        __func__, flag, voltdm->name);
 190                 return -EINVAL;
 191         }
 192
 193         /* All ready - set it and move on.. */
 194         voltdm->rmw(vc->auto_trans_mask, val << __ffs(vc->auto_trans_mask),
 195                     auto_trans->reg);
 196         return 0;
 197 }
 198
 199 void omap_vc_post_scale(struct voltagedomain *voltdm,
 200                         unsigned long target_volt,
 201                         struct omap_volt_data *target_vdata,
 202                         u8 target_vsel, u8 current_vsel)
 203 {
 204         struct omap_vc_channel *vc;
 205         u32 smps_steps = 0, smps_delay = 0;
 206         u8 on_vsel, onlp_vsel;
 207         u32 val;
 208
 209         if (IS_ERR_OR_NULL(voltdm)) {
 210                 pr_err("%s bad voldm\n", __func__);
 211                 return;
 212         }
 213
 214         vc = voltdm->vc;
 215         if (IS_ERR_OR_NULL(vc)) {
 216                 pr_err("%s voldm=%s bad vc\n", __func__, voltdm->name);
 217                 return;
 218         }
 219
 220         smps_steps = abs(target_vsel - current_vsel);
 221         /* SMPS slew rate / step size. 2us added as buffer. */
 222         smps_delay = ((smps_steps * voltdm->pmic->step_size) /
 223                         voltdm->pmic->slew_rate) + 2;
 224         udelay(smps_delay);
 225
 226         voltdm->curr_volt = target_vdata;
 227
 228         /* Set up the on voltage for wakeup from lp and OFF */
 229         on_vsel = voltdm->pmic->uv_to_vsel(target_volt);
 230         onlp_vsel = voltdm->pmic->uv_to_vsel(target_volt);
 231         val = (on_vsel << vc->common->cmd_on_shift) |
 232                (onlp_vsel << vc->common->cmd_onlp_shift) |
 233                vc->setup_voltage_common;
 234         voltdm->write(val, vc->cmdval_reg);
 235 }
 236
 237 static int omap_vc_bypass_send_value(struct voltagedomain *voltdm,
 238                 struct omap_vc_channel *vc, u8 sa, u8 reg, u32 data)
 239 {
 240         u32 loop_cnt = 0, retries_cnt = 0;
 241         u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
 242
 243         if (IS_ERR_OR_NULL(vc->common)) {
 244                 pr_err("%s voldm=%s bad value for vc->common\n",
 245                                 __func__, voltdm->name);
 246                 return -EINVAL;
 247         }
 248
 249         vc_valid = vc->common->valid;
 250         vc_bypass_val_reg = vc->common->bypass_val_reg;
 251         vc_bypass_value = (data << vc->common->data_shift) |
 252                 (reg << vc->common->regaddr_shift) |
 253                 (sa << vc->common->slaveaddr_shift);
 254
 255         voltdm->write(vc_bypass_value, vc_bypass_val_reg);
 256         voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
 257
 258         vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 259         /*
 260          * Loop till the bypass command is acknowledged from the SMPS.
 261          * NOTE: This is legacy code. The loop count and retry count needs
 262          * to be revisited.
 263          */
 264         while (vc_bypass_value & vc_valid) {
 265                 loop_cnt++;
 266
 267                 if (retries_cnt > 10) {
 268                         pr_warning("%s: Retry count exceeded\n", __func__);
 269                         return -ETIMEDOUT;
 270                 }
 271
 272                 if (loop_cnt > 50) {
 273                         retries_cnt++;
 274                         loop_cnt = 0;
 275                         udelay(10);
 276                 }
 277                 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 278         }
 279
 280         return 0;
 281
 282 }
 283
 284 /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
 285 int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 286                               struct omap_volt_data *target_v)
 287 {
 288         struct omap_vc_channel *vc;
 289         u8 target_vsel, current_vsel;
 290         int ret;
 291         unsigned long target_volt = omap_get_operation_voltage(target_v);
 292
 293         if (IS_ERR_OR_NULL(voltdm)) {
 294                 pr_err("%s bad voldm\n", __func__);
 295                 return -EINVAL;
 296         }
 297
 298         vc = voltdm->vc;
 299         if (IS_ERR_OR_NULL(vc)) {
 300                 pr_err("%s voldm=%s bad vc\n", __func__, voltdm->name);
 301                 return -EINVAL;
 302         }
 303
 304         ret = omap_vc_pre_scale(voltdm, target_volt, target_v, &target_vsel,
 305                                 &current_vsel);
 306         if (ret)
 307                 return ret;
 308
 309         ret = omap_vc_bypass_send_value(voltdm, vc, vc->i2c_slave_addr,
 310                                         vc->volt_reg_addr, target_vsel);
 311         if (ret)
 312                 return ret;
 313
 314         omap_vc_post_scale(voltdm, target_volt, target_v, target_vsel,
 315                         current_vsel);
 316         return 0;
 317 }
 318
 319 /**
 320  * omap_vc_bypass_send_i2c_msg() - Function to control PMIC registers over SRI2C
 321  * @voltdm:     voltage domain
 322  * @slave_addr: slave address of the device.
 323  * @reg_addr:   register address to access
 324  * @data:       what do we want to write there
 325  *
 326  * Many simpler PMICs with a single I2C interface still have configuration
 327  * registers that may need population. Typical being slew rate configurations
 328  * thermal shutdown configuration etc. When these PMICs are hooked on I2C_SR,
 329  * this function allows these configuration registers to be accessed.
 330  *
 331  * WARNING: Though this could be used for voltage register configurations over
 332  * I2C_SR, DONOT use it for that purpose, all the Voltage controller's internal
 333  * information is bypassed using this function and must be used judiciously.
 334  */
 335 int omap_vc_bypass_send_i2c_msg(struct voltagedomain *voltdm, u8 slave_addr,
 336                                 u8 reg_addr, u8 data)
 337 {
 338         struct omap_vc_channel *vc;
 339
 340         if (IS_ERR_OR_NULL(voltdm)) {
 341                 pr_err("%s bad voldm\n", __func__);
 342                 return -EINVAL;
 343         }
 344
 345         vc = voltdm->vc;
 346         if (IS_ERR_OR_NULL(vc)) {
 347                 pr_err("%s voldm=%s bad vc\n", __func__, voltdm->name);
 348                 return -EINVAL;
 349         }
 350
 351         return omap_vc_bypass_send_value(voltdm, vc, slave_addr,
 352                                         reg_addr, data);
 353 }
 354
 355 static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
 356 {
 357         /*
 358          * Voltage Manager FSM parameters init
 359          * XXX This data should be passed in from the board file
 360          */
 361         voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET);
 362         voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET);
 363         voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET);
 364 }
 365
 366 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 367 {
 368         static bool is_initialized;
 369
 370         if (is_initialized)
 371                 return;
 372
 373         omap3_vfsm_init(voltdm);
 374
 375         is_initialized = true;
 376 }
 377
 378
 379 /* OMAP4 specific voltage init functions */
 380 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 381 {
 382         static bool is_initialized;
 383         struct omap_voltdm_pmic *pmic = voltdm->pmic;
 384         u32 vc_val = 0;
 385
 386         if (is_initialized)
 387                 return;
 388
 389         if (pmic->i2c_high_speed) {
 390                 vc_val |= pmic->i2c_hscll_low << OMAP4430_HSCLL_SHIFT;
 391                 vc_val |= pmic->i2c_hscll_high << OMAP4430_HSCLH_SHIFT;
 392         }
 393
 394         vc_val |= pmic->i2c_scll_low << OMAP4430_SCLL_SHIFT;
 395         vc_val |= pmic->i2c_scll_high << OMAP4430_SCLH_SHIFT;
 396
 397         if (vc_val)
 398                 voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
 399
 400         is_initialized = true;
 401 }
 402
 403 /**
 404  * omap_vc_i2c_init - initialize I2C interface to PMIC
 405  * @voltdm: voltage domain containing VC data
 406  *
 407  * Use PMIC supplied seetings for I2C high-speed mode and
 408  * master code (if set) and program the VC I2C configuration
 409  * register.
 410  *
 411  * The VC I2C configuration is common to all VC channels,
 412  * so this function only configures I2C for the first VC
 413  * channel registers.  All other VC channels will use the
 414  * same configuration.
 415  */
 416 static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
 417 {
 418         struct omap_vc_channel *vc = voltdm->vc;
 419         static bool initialized;
 420         static bool i2c_high_speed;
 421         u8 mcode;
 422
 423         if (initialized) {
 424                 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
 425                         pr_warn("%s: I2C config for all channels must match.",
 426                                 __func__);
 427                 return;
 428         }
 429
 430         i2c_high_speed = voltdm->pmic->i2c_high_speed;
 431         if (i2c_high_speed)
 432                 voltdm->rmw(vc->common->i2c_cfg_hsen_mask,
 433                             vc->common->i2c_cfg_hsen_mask,
 434                             vc->common->i2c_cfg_reg);
 435
 436         mcode = voltdm->pmic->i2c_mcode;
 437         if (mcode)
 438                 voltdm->rmw(vc->common->i2c_mcode_mask,
 439                             mcode << __ffs(vc->common->i2c_mcode_mask),
 440                             vc->common->i2c_cfg_reg);
 441
 442         initialized = true;
 443 }
 444
 445 /**
 446  * omap_vc_setup_lp_time() - configure the voltage ramp time for low states.
 447  * @voltdm:     voltagedomain we are interested in.
 448  * @is_retention:       Are we interested in retention or OFF?
 449  *
 450  * The ramp times are calculated based on the worst case voltage drop,
 451  * which is the difference of on_volt and the ret_volt. This time is used
 452  * for computing the duration necessary for low power states such as retention.
 453  */
 454 static int __init omap_vc_setup_lp_time(struct voltagedomain *voltdm,
 455                                         bool is_retention)
 456 {
 457         u32 volt_drop = 0, volt_ramptime = 0, volt_rampcount;
 458         u32 sys_clk_mhz = 0, sysclk_cycles = 0, max_latency_for_prescaler = 0;
 459         struct clk *sys_ck;
 460         u8 pre_scaler = 0;
 461         struct omap_voltdm_pmic *pmic = voltdm->pmic;
 462         struct omap_vc_channel *vc = voltdm->vc;
 463         const struct setup_time_ramp_params *params;
 464
 465         params = vc->common->setup_time_params;
 466         /* If the VC data does not have params for us, return PMIC's value */
 467         if (!params)
 468                 return pmic->volt_setup_time;
 469         if (!params->pre_scaler_to_sysclk_cycles_count)
 470                 return pmic->volt_setup_time;
 471
 472         /* No of sys_clk cycles for pre_scaler 0 */
 473         sysclk_cycles = params->pre_scaler_to_sysclk_cycles[0];
 474
 475         sys_ck = clk_get(NULL, "sys_clkin_ck");
 476         if (IS_ERR_OR_NULL(sys_ck)) {
 477                 WARN_ONCE(1, "%s: unable to get sys_clkin_ck (voldm %s)\n",
 478                         __func__, voltdm->name);
 479                 return pmic->volt_setup_time;
 480         }
 481         sys_clk_mhz = clk_get_rate(sys_ck) / 1000000;
 482         clk_put(sys_ck);
 483
 484         /*
 485          *  If we chose prescaler 0x0, then we have a limit on the maximum
 486          *  latency for which we can chose a correct count. This is because,
 487          *  the count field is limited to 6 bits and max value can be 63 and
 488          *  for prescaler 0, ramp up/down counter is incremented every
 489          *  64 system clock cycles.
 490          *  for eg, max latency for prescaler for 38.4Mhz sys clk would be
 491          *  105 = (63 * 64) / 38.4
 492          */
 493         max_latency_for_prescaler = (63 * sysclk_cycles) / sys_clk_mhz;
 494
 495         if (is_retention)
 496                 volt_drop = pmic->on_volt - pmic->ret_volt;
 497         else
 498                 volt_drop = pmic->on_volt;
 499         volt_ramptime = DIV_ROUND_UP(volt_drop, pmic->slew_rate);
 500         volt_ramptime += OMAP_VC_I2C_ACK_DELAY;
 501
 502         /* many PMICs need additional time to switch back on */
 503         if (!is_retention)
 504                 volt_ramptime += pmic->switch_on_time;
 505
 506         if (volt_ramptime < max_latency_for_prescaler)
 507                 pre_scaler = 0x0;
 508         else
 509                 pre_scaler = 0x1;
 510
 511         /*
 512          * IF we mess up values, then try to have some form of recovery using
 513          * PMIC's value.
 514          */
 515         if (pre_scaler > params->pre_scaler_to_sysclk_cycles_count) {
 516                 pr_err("%s: prescaler idx %d > available %d on domain %s\n",
 517                        __func__, pre_scaler,
 518                        params->pre_scaler_to_sysclk_cycles_count, voltdm->name);
 519                 return pmic->volt_setup_time;
 520         }
 521
 522         sysclk_cycles = params->pre_scaler_to_sysclk_cycles[pre_scaler];
 523
 524         volt_rampcount = ((volt_ramptime * sys_clk_mhz) / sysclk_cycles) + 1;
 525
 526         return (pre_scaler << OMAP4430_RAMP_DOWN_PRESCAL_SHIFT) |
 527             (pre_scaler << OMAP4430_RAMP_UP_PRESCAL_SHIFT) |
 528             (volt_rampcount << OMAP4430_RAMP_DOWN_COUNT_SHIFT) |
 529             (volt_rampcount << OMAP4430_RAMP_UP_COUNT_SHIFT);
 530 }
 531
 532 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 533 {
 534         struct omap_vc_channel *vc = voltdm->vc;
 535         u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
 536         u32 val;
 537
 538         if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
 539                 pr_err("%s: PMIC info requried to configure vc for"
 540                         "vdd_%s not populated.Hence cannot initialize vc\n",
 541                         __func__, voltdm->name);
 542                 return;
 543         }
 544
 545         if (!voltdm->read || !voltdm->write) {
 546                 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 547                         __func__, voltdm->name);
 548                 return;
 549         }
 550
 551         vc->cfg_channel = 0;
 552         if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT)
 553                 vc_cfg_bits = &vc_mutant_channel_cfg;
 554         else
 555                 vc_cfg_bits = &vc_default_channel_cfg;
 556
 557         /* get PMIC/board specific settings */
 558         vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
 559         vc->volt_reg_addr = voltdm->pmic->volt_reg_addr;
 560         vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
 561         /* Calculate the RET voltage setup time and update volt_setup_time */
 562         vc->setup_time = omap_vc_setup_lp_time(voltdm, true);
 563
 564         if ((vc->flags & OMAP_VC_CHANNEL_DEFAULT) &&
 565                 ((vc->i2c_slave_addr == USE_DEFAULT_CHANNEL_I2C_PARAM) ||
 566                 (vc->cmd_reg_addr == USE_DEFAULT_CHANNEL_I2C_PARAM) ||
 567                 (vc->volt_reg_addr == USE_DEFAULT_CHANNEL_I2C_PARAM))) {
 568                 pr_err("%s: voltdm %s: default channel "
 569                         "bad config-sa=%2x vol=%2x, cmd=%2x?\n", __func__,
 570                         voltdm->name, vc->i2c_slave_addr, vc->volt_reg_addr,
 571                         vc->cmd_reg_addr);
 572                 return;
 573         }
 574
 575         /* Configure the i2c slave address for this VC */
 576         if (vc->i2c_slave_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
 577                 voltdm->rmw(vc->smps_sa_mask,
 578                         vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
 579                         vc->common->smps_sa_reg);
 580                 vc->cfg_channel |= vc_cfg_bits->sa;
 581         }
 582
 583         /*
 584          * Configure the PMIC register addresses.
 585          */
 586         if (vc->volt_reg_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
 587                 voltdm->rmw(vc->smps_volra_mask,
 588                             vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
 589                             vc->common->smps_volra_reg);
 590                 vc->cfg_channel |= vc_cfg_bits->rav;
 591         }
 592
 593         if (vc->cmd_reg_addr != USE_DEFAULT_CHANNEL_I2C_PARAM) {
 594                 voltdm->rmw(vc->smps_cmdra_mask,
 595                             vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
 596                             vc->common->smps_cmdra_reg);
 597                 vc->cfg_channel |= vc_cfg_bits->rac;
 598         }
 599
 600         /* If voltage and cmd regs are same, we can use cmdra register */
 601         if (vc->volt_reg_addr == vc->cmd_reg_addr)
 602                 vc->cfg_channel |= vc_cfg_bits->racen;
 603
 604         /* Set up the on, inactive, retention and off voltage */
 605         on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt);
 606         onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt);
 607         ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt);
 608         off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt);
 609         vc->setup_voltage_common =
 610                (ret_vsel << vc->common->cmd_ret_shift) |
 611                (off_vsel << vc->common->cmd_off_shift);
 612         val = (on_vsel << vc->common->cmd_on_shift) |
 613                (onlp_vsel << vc->common->cmd_onlp_shift) |
 614                vc->setup_voltage_common;
 615         voltdm->write(val, vc->cmdval_reg);
 616         vc->cfg_channel |= vc_cfg_bits->cmd;
 617
 618         /* Channel configuration */
 619         omap_vc_config_channel(voltdm);
 620
 621         /* Configure the setup times */
 622         voltdm->rmw(voltdm->vfsm->voltsetup_mask,
 623                     vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask),
 624                     voltdm->vfsm->voltsetup_reg);
 625         voltdm->rmw(voltdm->vfsm->voltsetup_mask,
 626                     omap_vc_setup_lp_time(voltdm, false) <<
 627                         ffs(voltdm->vfsm->voltsetup_mask),
 628                     voltdm->vfsm->voltsetupoff_reg);
 629
 630         omap_vc_i2c_init(voltdm);
 631
 632         if (cpu_is_omap34xx())
 633                 omap3_vc_init_channel(voltdm);
 634         else if (cpu_is_omap44xx())
 635                 omap4_vc_init_channel(voltdm);
 636 }