ARM: cpu topology: Add debugfs interface for cpu_power
[cmplus.git] / arch / arm / mach-omap2 / vc.h
blob66c6d9aff73ff3ef35e87f055cc22d8b081d44c7
1 /*
2 * OMAP3/4 Voltage Controller (VC) structure and macro definitions
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License version
15 * 2 as published by the Free Software Foundation.
17 #ifndef __ARCH_ARM_MACH_OMAP2_VC_H
18 #define __ARCH_ARM_MACH_OMAP2_VC_H
20 #include <linux/kernel.h>
22 struct voltagedomain;
24 /**
25 * struct setup_time_ramp_params - ramp time parameters
26 * @pre_scaler_to_sysclk_cycles: The array represents correlation of prescaler
27 * to the number of system clock cycles, for which rampdown counter is
28 * incremented or decremented in PRM_VOLTSETUP_XXX_RET_SLEEP registers.
29 * This is to handle variances in defined values due to conditions such
30 * as "Errata Id: i623: Retention/Sleep Voltage Transitions Ramp Time"
31 * @pre_scaler_to_sysclk_cycles_count: number of entries available
33 * Add parameters that allow us to compute the ramp time for the device
35 struct setup_time_ramp_params {
36 u16 *pre_scaler_to_sysclk_cycles;
37 u8 pre_scaler_to_sysclk_cycles_count;
40 /**
41 * struct omap_vc_common - per-VC register/bitfield data
42 * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
43 * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
44 * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
45 * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
46 * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
47 * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
48 * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
49 * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
50 * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
51 * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
52 * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
53 * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
54 * @i2c_cfg_reg: I2C configuration register offset
55 * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
56 * @i2c_mcode_mask: MCODE field mask for I2C config register
57 * @setup_time_params: setup time parameters
59 * XXX One of cmd_on_mask and cmd_on_shift are not needed
60 * XXX VALID should probably be a shift, not a mask
62 struct omap_vc_common {
63 u32 cmd_on_mask;
64 u32 valid;
65 u8 smps_sa_reg;
66 u8 smps_volra_reg;
67 u8 smps_cmdra_reg;
68 u8 bypass_val_reg;
69 u8 data_shift;
70 u8 slaveaddr_shift;
71 u8 regaddr_shift;
72 u8 cmd_on_shift;
73 u8 cmd_onlp_shift;
74 u8 cmd_ret_shift;
75 u8 cmd_off_shift;
76 u8 cfg_channel_reg;
77 u8 i2c_cfg_reg;
78 u8 i2c_cfg_hsen_mask;
79 u8 i2c_mcode_mask;
80 struct setup_time_ramp_params *setup_time_params;
83 /**
84 * struct omap_vc_auto_trans - describe the auto transition for the domain
85 * @reg: register to modify (usually PRM_VOLTCTRL)
86 * @sleep_val: value to set for enabling sleep transition
87 * @retention_val: value to set for enabling retention transition
88 * @off_val: value to set for enabling off transition
90 struct omap_vc_auto_trans {
91 u8 reg;
92 u8 sleep_val;
93 u8 retention_val;
94 u8 off_val;
97 /* omap_vc_channel.flags values */
98 #define OMAP_VC_CHANNEL_DEFAULT BIT(0)
99 #define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1)
102 * struct omap_vc_channel - VC per-instance data
103 * @flags: VC channel-specific flags (optional)
104 * @common: pointer to VC common data for this platform
105 * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
106 * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
107 * @auto_trans: Auto transition information
108 * @auto_trans_mask: Auto transition mask for this channel
110 struct omap_vc_channel {
111 u8 flags;
113 /* channel state */
114 u16 i2c_slave_addr;
115 u16 volt_reg_addr;
116 u16 cmd_reg_addr;
117 u8 cfg_channel;
118 u32 setup_time;
119 u32 setup_voltage_common;
120 bool i2c_high_speed;
122 /* register access data */
123 const struct omap_vc_common *common;
124 u32 smps_sa_mask;
125 u32 smps_volra_mask;
126 u32 smps_cmdra_mask;
127 u8 cmdval_reg;
128 u8 cfg_channel_sa_shift;
130 const struct omap_vc_auto_trans *auto_trans;
131 u32 auto_trans_mask;
134 extern struct omap_vc_channel omap3_vc_mpu;
135 extern struct omap_vc_channel omap3_vc_core;
137 extern struct omap_vc_channel omap4_vc_mpu;
138 extern struct omap_vc_channel omap4_vc_iva;
139 extern struct omap_vc_channel omap4_vc_core;
141 void omap_vc_init_channel(struct voltagedomain *voltdm);
142 int omap_vc_pre_scale(struct voltagedomain *voltdm,
143 unsigned long target_volt,
144 struct omap_volt_data *target_vdata,
145 u8 *target_vsel, u8 *current_vsel);
146 void omap_vc_post_scale(struct voltagedomain *voltdm,
147 unsigned long target_volt,
148 struct omap_volt_data *target_vdata,
149 u8 target_vsel, u8 current_vsel);
151 /* Auto transition flags for users */
152 #define OMAP_VC_CHANNEL_AUTO_TRANSITION_DISABLE 0
153 #define OMAP_VC_CHANNEL_AUTO_TRANSITION_SLEEP 1
154 #define OMAP_VC_CHANNEL_AUTO_TRANSITION_RETENTION 2
155 #define OMAP_VC_CHANNEL_AUTO_TRANSITION_OFF 3
156 /* For silicon data to mark unsupported transition */
157 #define OMAP_VC_CHANNEL_AUTO_TRANSITION_UNSUPPORTED 0xff
158 int omap_vc_set_auto_trans(struct voltagedomain *voltdm, u8 flag);
159 int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
160 struct omap_volt_data *target_volt);
161 int omap_vc_bypass_send_i2c_msg(struct voltagedomain *voltdm,
162 u8 slave_addr, u8 reg_addr, u8 data);
163 #endif