drivers/staging/msm/mddihost.h

   1 /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 #ifndef MDDIHOST_H
  14 #define MDDIHOST_H
  15
  16 #include <linux/kernel.h>
  17 #include <linux/sched.h>
  18 #include <linux/time.h>
  19 #include <linux/init.h>
  20 #include <linux/interrupt.h>
  21 #include "linux/proc_fs.h"
  22 #include <linux/types.h>
  23 #include <linux/dma-mapping.h>
  24 #include <linux/clk.h>
  25
  26 #include <mach/hardware.h>
  27 #include <linux/io.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/mach-types.h>
  31
  32 #include "msm_fb_panel.h"
  33
  34 #undef FEATURE_MDDI_MC4
  35 #undef FEATURE_MDDI_S6D0142
  36 #undef FEATURE_MDDI_HITACHI
  37 #define FEATURE_MDDI_SHARP
  38 #define FEATURE_MDDI_TOSHIBA
  39 #undef FEATURE_MDDI_E751
  40 #define FEATURE_MDDI_CORONA
  41 #define FEATURE_MDDI_PRISM
  42
  43 #define T_MSM7500
  44
  45 typedef enum {
  46         format_16bpp,
  47         format_18bpp,
  48         format_24bpp
  49 } mddi_video_format;
  50
  51 typedef enum {
  52         MDDI_LCD_NONE = 0,
  53         MDDI_LCD_MC4,
  54         MDDI_LCD_S6D0142,
  55         MDDI_LCD_SHARP,
  56         MDDI_LCD_E751,
  57         MDDI_LCD_CORONA,
  58         MDDI_LCD_HITACHI,
  59         MDDI_LCD_TOSHIBA,
  60         MDDI_LCD_PRISM,
  61         MDDI_LCD_TP2,
  62         MDDI_NUM_LCD_TYPES,
  63         MDDI_LCD_DEFAULT = MDDI_LCD_TOSHIBA
  64 } mddi_lcd_type;
  65
  66 typedef enum {
  67         MDDI_HOST_PRIM = 0,
  68         MDDI_HOST_EXT,
  69         MDDI_NUM_HOST_CORES
  70 } mddi_host_type;
  71
  72 typedef enum {
  73         MDDI_DRIVER_RESET,      /* host core registers have not been written. */
  74         MDDI_DRIVER_DISABLED,   /* registers written, interrupts disabled. */
  75         MDDI_DRIVER_ENABLED     /* registers written, interrupts enabled. */
  76 } mddi_host_driver_state_type;
  77
  78 typedef enum {
  79         MDDI_GPIO_INT_0 = 0,
  80         MDDI_GPIO_INT_1,
  81         MDDI_GPIO_INT_2,
  82         MDDI_GPIO_INT_3,
  83         MDDI_GPIO_INT_4,
  84         MDDI_GPIO_INT_5,
  85         MDDI_GPIO_INT_6,
  86         MDDI_GPIO_INT_7,
  87         MDDI_GPIO_INT_8,
  88         MDDI_GPIO_INT_9,
  89         MDDI_GPIO_INT_10,
  90         MDDI_GPIO_INT_11,
  91         MDDI_GPIO_INT_12,
  92         MDDI_GPIO_INT_13,
  93         MDDI_GPIO_INT_14,
  94         MDDI_GPIO_INT_15,
  95         MDDI_GPIO_NUM_INTS
  96 } mddi_gpio_int_type;
  97
  98 enum mddi_data_packet_size_type {
  99         MDDI_DATA_PACKET_4_BYTES  = 4,
 100         MDDI_DATA_PACKET_8_BYTES  = 8,
 101         MDDI_DATA_PACKET_12_BYTES = 12,
 102         MDDI_DATA_PACKET_16_BYTES = 16,
 103         MDDI_DATA_PACKET_24_BYTES = 24
 104 };
 105
 106 typedef struct {
 107         uint32 addr;
 108         uint32 value;
 109 } mddi_reg_write_type;
 110
 111 boolean mddi_vsync_set_handler(msm_fb_vsync_handler_type handler, void *arg);
 112
 113 typedef void (*mddi_llist_done_cb_type) (void);
 114
 115 typedef void (*mddi_rev_handler_type) (void *);
 116
 117 boolean mddi_set_rev_handler(mddi_rev_handler_type handler, uint16 pkt_type);
 118
 119 #define MDDI_DEFAULT_PRIM_PIX_ATTR 0xC3
 120 #define MDDI_DEFAULT_SECD_PIX_ATTR 0xC0
 121
 122 typedef int gpio_int_polarity_type;
 123 typedef int gpio_int_handler_type;
 124
 125 typedef struct {
 126         void (*vsync_detected) (boolean);
 127 } mddi_lcd_func_type;
 128
 129 extern mddi_lcd_func_type mddi_lcd;
 130 void mddi_init(void);
 131
 132 void mddi_powerdown(void);
 133
 134 void mddi_host_start_ext_display(void);
 135 void mddi_host_stop_ext_display(void);
 136
 137 extern spinlock_t mddi_host_spin_lock;
 138 #ifdef T_MSM7500
 139 void mddi_reset(void);
 140 #ifdef FEATURE_DUAL_PROC_MODEM_DISPLAY
 141 void mddi_host_switch_proc_control(boolean on);
 142 #endif
 143 #endif
 144 void mddi_host_exit_power_collapse(void);
 145
 146 void mddi_queue_splash_screen
 147     (void *buf_ptr,
 148      boolean clear_area,
 149      int16 src_width,
 150      int16 src_starting_row,
 151      int16 src_starting_column,
 152      int16 num_of_rows,
 153      int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column);
 154
 155 void mddi_queue_image
 156     (void *buf_ptr,
 157      uint8 stereo_video,
 158      boolean clear_area,
 159      int16 src_width,
 160      int16 src_starting_row,
 161      int16 src_starting_column,
 162      int16 num_of_rows,
 163      int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column);
 164
 165 int mddi_host_register_read
 166     (uint32 reg_addr,
 167      uint32 *reg_value_ptr, boolean wait, mddi_host_type host_idx);
 168 int mddi_host_register_write
 169     (uint32 reg_addr, uint32 reg_val,
 170      enum mddi_data_packet_size_type packet_size,
 171      boolean wait, mddi_llist_done_cb_type done_cb, mddi_host_type host);
 172 boolean mddi_host_register_write_int
 173     (uint32 reg_addr,
 174      uint32 reg_val, mddi_llist_done_cb_type done_cb, mddi_host_type host);
 175 boolean mddi_host_register_read_int
 176     (uint32 reg_addr, uint32 *reg_value_ptr, mddi_host_type host_idx);
 177 void mddi_queue_register_write_static
 178     (uint32 reg_addr,
 179      uint32 reg_val, boolean wait, mddi_llist_done_cb_type done_cb);
 180 void mddi_queue_static_window_adjust
 181     (const mddi_reg_write_type *reg_write,
 182      uint16 num_writes, mddi_llist_done_cb_type done_cb);
 183
 184 #define mddi_queue_register_read(reg, val_ptr, wait, sig) \
 185         mddi_host_register_read(reg, val_ptr, wait, MDDI_HOST_PRIM)
 186 #define mddi_queue_register_write(reg, val, wait, sig) \
 187         mddi_host_register_write(reg, val, MDDI_DATA_PACKET_4_BYTES,\
 188         wait, NULL, MDDI_HOST_PRIM)
 189 #define mddi_queue_register_write_extn(reg, val, pkt_size, wait, sig) \
 190         mddi_host_register_write(reg, val, pkt_size, \
 191         wait, NULL, MDDI_HOST_PRIM)
 192 #define mddi_queue_register_write_int(reg, val) \
 193         mddi_host_register_write_int(reg, val, NULL, MDDI_HOST_PRIM)
 194 #define mddi_queue_register_read_int(reg, val_ptr) \
 195         mddi_host_register_read_int(reg, val_ptr, MDDI_HOST_PRIM)
 196 #define mddi_queue_register_writes(reg_ptr, val, wait, sig) \
 197         mddi_host_register_writes(reg_ptr, val, wait, sig, MDDI_HOST_PRIM)
 198
 199 void mddi_wait(uint16 time_ms);
 200 void mddi_assign_max_pkt_dimensions(uint16 image_cols,
 201                                     uint16 image_rows,
 202                                     uint16 bpp,
 203                                     uint16 *max_cols, uint16 * max_rows);
 204 uint16 mddi_assign_pkt_height(uint16 pkt_width, uint16 pkt_height, uint16 bpp);
 205 void mddi_queue_reverse_encapsulation(boolean wait);
 206 void mddi_disable(int lock);
 207 #endif /* MDDIHOST_H */