new retransmit part 3
[cor_2_6_31.git] / include / linux / irq.h
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1 #ifndef _LINUX_IRQ_H
2 #define _LINUX_IRQ_H
4 /*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
9 * Thanks. --rmk
12 #include <linux/smp.h>
14 #ifndef CONFIG_S390
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/gfp.h>
21 #include <linux/irqreturn.h>
22 #include <linux/irqnr.h>
23 #include <linux/errno.h>
24 #include <linux/topology.h>
25 #include <linux/wait.h>
27 #include <asm/irq.h>
28 #include <asm/ptrace.h>
29 #include <asm/irq_regs.h>
31 struct irq_desc;
32 typedef void (*irq_flow_handler_t)(unsigned int irq,
33 struct irq_desc *desc);
37 * IRQ line status.
39 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
41 * IRQ types
43 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
44 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
45 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
46 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
47 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
48 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
49 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
50 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
52 /* Internal flags */
53 #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
54 #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
55 #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
56 #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
57 #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
58 #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
59 #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
60 #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
61 #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
62 #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
63 #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
64 #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
65 #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */
66 #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */
67 #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */
68 #define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */
69 #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
70 #define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
71 #define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */
73 #ifdef CONFIG_IRQ_PER_CPU
74 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
75 # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
76 #else
77 # define CHECK_IRQ_PER_CPU(var) 0
78 # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
79 #endif
81 struct proc_dir_entry;
82 struct msi_desc;
84 /**
85 * struct irq_chip - hardware interrupt chip descriptor
87 * @name: name for /proc/interrupts
88 * @startup: start up the interrupt (defaults to ->enable if NULL)
89 * @shutdown: shut down the interrupt (defaults to ->disable if NULL)
90 * @enable: enable the interrupt (defaults to chip->unmask if NULL)
91 * @disable: disable the interrupt (defaults to chip->mask if NULL)
92 * @ack: start of a new interrupt
93 * @mask: mask an interrupt source
94 * @mask_ack: ack and mask an interrupt source
95 * @unmask: unmask an interrupt source
96 * @eoi: end of interrupt - chip level
97 * @end: end of interrupt - flow level
98 * @set_affinity: set the CPU affinity on SMP machines
99 * @retrigger: resend an IRQ to the CPU
100 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
101 * @set_wake: enable/disable power-management wake-on of an IRQ
103 * @release: release function solely used by UML
104 * @typename: obsoleted by name, kept as migration helper
106 struct irq_chip {
107 const char *name;
108 unsigned int (*startup)(unsigned int irq);
109 void (*shutdown)(unsigned int irq);
110 void (*enable)(unsigned int irq);
111 void (*disable)(unsigned int irq);
113 void (*ack)(unsigned int irq);
114 void (*mask)(unsigned int irq);
115 void (*mask_ack)(unsigned int irq);
116 void (*unmask)(unsigned int irq);
117 void (*eoi)(unsigned int irq);
119 void (*end)(unsigned int irq);
120 int (*set_affinity)(unsigned int irq,
121 const struct cpumask *dest);
122 int (*retrigger)(unsigned int irq);
123 int (*set_type)(unsigned int irq, unsigned int flow_type);
124 int (*set_wake)(unsigned int irq, unsigned int on);
126 /* Currently used only by UML, might disappear one day.*/
127 #ifdef CONFIG_IRQ_RELEASE_METHOD
128 void (*release)(unsigned int irq, void *dev_id);
129 #endif
131 * For compatibility, ->typename is copied into ->name.
132 * Will disappear.
134 const char *typename;
137 struct timer_rand_state;
138 struct irq_2_iommu;
140 * struct irq_desc - interrupt descriptor
141 * @irq: interrupt number for this descriptor
142 * @timer_rand_state: pointer to timer rand state struct
143 * @kstat_irqs: irq stats per cpu
144 * @irq_2_iommu: iommu with this irq
145 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
146 * @chip: low level interrupt hardware access
147 * @msi_desc: MSI descriptor
148 * @handler_data: per-IRQ data for the irq_chip methods
149 * @chip_data: platform-specific per-chip private data for the chip
150 * methods, to allow shared chip implementations
151 * @action: the irq action chain
152 * @status: status information
153 * @depth: disable-depth, for nested irq_disable() calls
154 * @wake_depth: enable depth, for multiple set_irq_wake() callers
155 * @irq_count: stats field to detect stalled irqs
156 * @last_unhandled: aging timer for unhandled count
157 * @irqs_unhandled: stats field for spurious unhandled interrupts
158 * @lock: locking for SMP
159 * @affinity: IRQ affinity on SMP
160 * @node: node index useful for balancing
161 * @pending_mask: pending rebalanced interrupts
162 * @threads_active: number of irqaction threads currently running
163 * @wait_for_threads: wait queue for sync_irq to wait for threaded handlers
164 * @dir: /proc/irq/ procfs entry
165 * @name: flow handler name for /proc/interrupts output
167 struct irq_desc {
168 unsigned int irq;
169 struct timer_rand_state *timer_rand_state;
170 unsigned int *kstat_irqs;
171 #ifdef CONFIG_INTR_REMAP
172 struct irq_2_iommu *irq_2_iommu;
173 #endif
174 irq_flow_handler_t handle_irq;
175 struct irq_chip *chip;
176 struct msi_desc *msi_desc;
177 void *handler_data;
178 void *chip_data;
179 struct irqaction *action; /* IRQ action list */
180 unsigned int status; /* IRQ status */
182 unsigned int depth; /* nested irq disables */
183 unsigned int wake_depth; /* nested wake enables */
184 unsigned int irq_count; /* For detecting broken IRQs */
185 unsigned long last_unhandled; /* Aging timer for unhandled count */
186 unsigned int irqs_unhandled;
187 spinlock_t lock;
188 #ifdef CONFIG_SMP
189 cpumask_var_t affinity;
190 unsigned int node;
191 #ifdef CONFIG_GENERIC_PENDING_IRQ
192 cpumask_var_t pending_mask;
193 #endif
194 #endif
195 atomic_t threads_active;
196 wait_queue_head_t wait_for_threads;
197 #ifdef CONFIG_PROC_FS
198 struct proc_dir_entry *dir;
199 #endif
200 const char *name;
201 } ____cacheline_internodealigned_in_smp;
203 extern void arch_init_copy_chip_data(struct irq_desc *old_desc,
204 struct irq_desc *desc, int node);
205 extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc);
207 #ifndef CONFIG_SPARSE_IRQ
208 extern struct irq_desc irq_desc[NR_IRQS];
209 #endif
211 #ifdef CONFIG_NUMA_IRQ_DESC
212 extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int node);
213 #else
214 static inline struct irq_desc *move_irq_desc(struct irq_desc *desc, int node)
216 return desc;
218 #endif
220 extern struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node);
223 * Migration helpers for obsolete names, they will go away:
225 #define hw_interrupt_type irq_chip
226 #define no_irq_type no_irq_chip
227 typedef struct irq_desc irq_desc_t;
230 * Pick up the arch-dependent methods:
232 #include <asm/hw_irq.h>
234 extern int setup_irq(unsigned int irq, struct irqaction *new);
235 extern void remove_irq(unsigned int irq, struct irqaction *act);
237 #ifdef CONFIG_GENERIC_HARDIRQS
239 #ifdef CONFIG_SMP
241 #ifdef CONFIG_GENERIC_PENDING_IRQ
243 void move_native_irq(int irq);
244 void move_masked_irq(int irq);
246 #else /* CONFIG_GENERIC_PENDING_IRQ */
248 static inline void move_irq(int irq)
252 static inline void move_native_irq(int irq)
256 static inline void move_masked_irq(int irq)
260 #endif /* CONFIG_GENERIC_PENDING_IRQ */
262 #else /* CONFIG_SMP */
264 #define move_native_irq(x)
265 #define move_masked_irq(x)
267 #endif /* CONFIG_SMP */
269 extern int no_irq_affinity;
271 static inline int irq_balancing_disabled(unsigned int irq)
273 struct irq_desc *desc;
275 desc = irq_to_desc(irq);
276 return desc->status & IRQ_NO_BALANCING_MASK;
279 /* Handle irq action chains: */
280 extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action);
283 * Built-in IRQ handlers for various IRQ types,
284 * callable via desc->chip->handle_irq()
286 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
287 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
288 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
289 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
290 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
291 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
294 * Monolithic do_IRQ implementation.
296 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
297 extern unsigned int __do_IRQ(unsigned int irq);
298 #endif
301 * Architectures call this to let the generic IRQ layer
302 * handle an interrupt. If the descriptor is attached to an
303 * irqchip-style controller then we call the ->handle_irq() handler,
304 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
306 static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
308 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
309 desc->handle_irq(irq, desc);
310 #else
311 if (likely(desc->handle_irq))
312 desc->handle_irq(irq, desc);
313 else
314 __do_IRQ(irq);
315 #endif
318 static inline void generic_handle_irq(unsigned int irq)
320 generic_handle_irq_desc(irq, irq_to_desc(irq));
323 /* Handling of unhandled and spurious interrupts: */
324 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
325 irqreturn_t action_ret);
327 /* Resending of interrupts :*/
328 void check_irq_resend(struct irq_desc *desc, unsigned int irq);
330 /* Enable/disable irq debugging output: */
331 extern int noirqdebug_setup(char *str);
333 /* Checks whether the interrupt can be requested by request_irq(): */
334 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
336 /* Dummy irq-chip implementations: */
337 extern struct irq_chip no_irq_chip;
338 extern struct irq_chip dummy_irq_chip;
340 extern void
341 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
342 irq_flow_handler_t handle);
343 extern void
344 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
345 irq_flow_handler_t handle, const char *name);
347 extern void
348 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
349 const char *name);
351 /* caller has locked the irq_desc and both params are valid */
352 static inline void __set_irq_handler_unlocked(int irq,
353 irq_flow_handler_t handler)
355 struct irq_desc *desc;
357 desc = irq_to_desc(irq);
358 desc->handle_irq = handler;
362 * Set a highlevel flow handler for a given IRQ:
364 static inline void
365 set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
367 __set_irq_handler(irq, handle, 0, NULL);
371 * Set a highlevel chained flow handler for a given IRQ.
372 * (a chained handler is automatically enabled and set to
373 * IRQ_NOREQUEST and IRQ_NOPROBE)
375 static inline void
376 set_irq_chained_handler(unsigned int irq,
377 irq_flow_handler_t handle)
379 __set_irq_handler(irq, handle, 1, NULL);
382 extern void set_irq_noprobe(unsigned int irq);
383 extern void set_irq_probe(unsigned int irq);
385 /* Handle dynamic irq creation and destruction */
386 extern unsigned int create_irq_nr(unsigned int irq_want, int node);
387 extern int create_irq(void);
388 extern void destroy_irq(unsigned int irq);
390 /* Test to see if a driver has successfully requested an irq */
391 static inline int irq_has_action(unsigned int irq)
393 struct irq_desc *desc = irq_to_desc(irq);
394 return desc->action != NULL;
397 /* Dynamic irq helper functions */
398 extern void dynamic_irq_init(unsigned int irq);
399 extern void dynamic_irq_cleanup(unsigned int irq);
401 /* Set/get chip/data for an IRQ: */
402 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
403 extern int set_irq_data(unsigned int irq, void *data);
404 extern int set_irq_chip_data(unsigned int irq, void *data);
405 extern int set_irq_type(unsigned int irq, unsigned int type);
406 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
408 #define get_irq_chip(irq) (irq_to_desc(irq)->chip)
409 #define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
410 #define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
411 #define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
413 #define get_irq_desc_chip(desc) ((desc)->chip)
414 #define get_irq_desc_chip_data(desc) ((desc)->chip_data)
415 #define get_irq_desc_data(desc) ((desc)->handler_data)
416 #define get_irq_desc_msi(desc) ((desc)->msi_desc)
418 #endif /* CONFIG_GENERIC_HARDIRQS */
420 #endif /* !CONFIG_S390 */
422 #ifdef CONFIG_SMP
424 * alloc_desc_masks - allocate cpumasks for irq_desc
425 * @desc: pointer to irq_desc struct
426 * @node: node which will be handling the cpumasks
427 * @boot: true if need bootmem
429 * Allocates affinity and pending_mask cpumask if required.
430 * Returns true if successful (or not required).
432 static inline bool alloc_desc_masks(struct irq_desc *desc, int node,
433 bool boot)
435 gfp_t gfp = GFP_ATOMIC;
437 if (boot)
438 gfp = GFP_NOWAIT;
440 #ifdef CONFIG_CPUMASK_OFFSTACK
441 if (!alloc_cpumask_var_node(&desc->affinity, gfp, node))
442 return false;
444 #ifdef CONFIG_GENERIC_PENDING_IRQ
445 if (!alloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
446 free_cpumask_var(desc->affinity);
447 return false;
449 #endif
450 #endif
451 return true;
454 static inline void init_desc_masks(struct irq_desc *desc)
456 cpumask_setall(desc->affinity);
457 #ifdef CONFIG_GENERIC_PENDING_IRQ
458 cpumask_clear(desc->pending_mask);
459 #endif
463 * init_copy_desc_masks - copy cpumasks for irq_desc
464 * @old_desc: pointer to old irq_desc struct
465 * @new_desc: pointer to new irq_desc struct
467 * Insures affinity and pending_masks are copied to new irq_desc.
468 * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the
469 * irq_desc struct so the copy is redundant.
472 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
473 struct irq_desc *new_desc)
475 #ifdef CONFIG_CPUMASK_OFFSTACK
476 cpumask_copy(new_desc->affinity, old_desc->affinity);
478 #ifdef CONFIG_GENERIC_PENDING_IRQ
479 cpumask_copy(new_desc->pending_mask, old_desc->pending_mask);
480 #endif
481 #endif
484 static inline void free_desc_masks(struct irq_desc *old_desc,
485 struct irq_desc *new_desc)
487 free_cpumask_var(old_desc->affinity);
489 #ifdef CONFIG_GENERIC_PENDING_IRQ
490 free_cpumask_var(old_desc->pending_mask);
491 #endif
494 #else /* !CONFIG_SMP */
496 static inline bool alloc_desc_masks(struct irq_desc *desc, int node,
497 bool boot)
499 return true;
502 static inline void init_desc_masks(struct irq_desc *desc)
506 static inline void init_copy_desc_masks(struct irq_desc *old_desc,
507 struct irq_desc *new_desc)
511 static inline void free_desc_masks(struct irq_desc *old_desc,
512 struct irq_desc *new_desc)
515 #endif /* CONFIG_SMP */
517 #endif /* _LINUX_IRQ_H */