?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
printk removal, receive reordering bugfix
[cor_2_6_31.git] / drivers / block / umem.c
blob858c34dd032d27d31cadb2112e7bc36ec36fe8de
1 /*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
3 *
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
7 *
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
10 *
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
14 *
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
35 */
36
37 #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
38 #include <linux/fs.h>
39 #include <linux/bio.h>
40 #include <linux/kernel.h>
41 #include <linux/mm.h>
42 #include <linux/mman.h>
43 #include <linux/ioctl.h>
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/interrupt.h>
47 #include <linux/timer.h>
48 #include <linux/pci.h>
49 #include <linux/slab.h>
50 #include <linux/dma-mapping.h>
51
52 #include <linux/fcntl.h> /* O_ACCMODE */
53 #include <linux/hdreg.h> /* HDIO_GETGEO */
54
55 #include "umem.h"
56
57 #include <asm/uaccess.h>
58 #include <asm/io.h>
59
60 #define MM_MAXCARDS 4
61 #define MM_RAHEAD 2 /* two sectors */
62 #define MM_BLKSIZE 1024 /* 1k blocks */
63 #define MM_HARDSECT 512 /* 512-byte hardware sectors */
64 #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
65
66 /*
67 * Version Information
68 */
69
70 #define DRIVER_NAME "umem"
71 #define DRIVER_VERSION "v2.3"
72 #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73 #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
74
75 static int debug;
76 /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77 #define HW_TRACE(x)
78
79 #define DEBUG_LED_ON_TRANSFER 0x01
80 #define DEBUG_BATTERY_POLLING 0x02
81
82 module_param(debug, int, 0644);
83 MODULE_PARM_DESC(debug, "Debug bitmask");
84
85 static int pci_read_cmd = 0x0C; /* Read Multiple */
86 module_param(pci_read_cmd, int, 0);
87 MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
88
89 static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90 module_param(pci_write_cmd, int, 0);
91 MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
92
93 static int pci_cmds;
94
95 static int major_nr;
96
97 #include <linux/blkdev.h>
98 #include <linux/blkpg.h>
99
100 struct cardinfo {
101 struct pci_dev *dev;
102
103 unsigned char __iomem *csr_remap;
104 unsigned int mm_size; /* size in kbytes */
105
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
109 */
110 struct bio *bio, *currentbio, **biotail;
111 int current_idx;
112 sector_t current_sector;
113
114 struct request_queue *queue;
115
116 struct mm_page {
117 dma_addr_t page_dma;
118 struct mm_dma_desc *desc;
119 int cnt, headcnt;
120 struct bio *bio, **biotail;
121 int idx;
122 } mm_pages[2];
123 #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
124
125 int Active, Ready;
126
127 struct tasklet_struct tasklet;
128 unsigned int dma_status;
129
130 struct {
131 int good;
132 int warned;
133 unsigned long last_change;
134 } battery[2];
135
136 spinlock_t lock;
137 int check_batteries;
138
139 int flags;
140 };
141
142 static struct cardinfo cards[MM_MAXCARDS];
143 static struct block_device_operations mm_fops;
144 static struct timer_list battery_timer;
145
146 static int num_cards;
147
148 static struct gendisk *mm_gendisk[MM_MAXCARDS];
149
150 static void check_batteries(struct cardinfo *card);
151
152 static int get_userbit(struct cardinfo *card, int bit)
153 {
154 unsigned char led;
155
156 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
157 return led & bit;
158 }
159
160 static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
161 {
162 unsigned char led;
163
164 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
165 if (state)
166 led |= bit;
167 else
168 led &= ~bit;
169 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
170
171 return 0;
172 }
173
174 /*
175 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
176 */
177 static void set_led(struct cardinfo *card, int shift, unsigned char state)
178 {
179 unsigned char led;
180
181 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
182 if (state == LED_FLIP)
183 led ^= (1<<shift);
184 else {
185 led &= ~(0x03 << shift);
186 led |= (state << shift);
187 }
188 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
189
190 }
191
192 #ifdef MM_DIAG
193 static void dump_regs(struct cardinfo *card)
194 {
195 unsigned char *p;
196 int i, i1;
197
198 p = card->csr_remap;
199 for (i = 0; i < 8; i++) {
200 printk(KERN_DEBUG "%p ", p);
201
202 for (i1 = 0; i1 < 16; i1++)
203 printk("%02x ", *p++);
204
205 printk("\n");
206 }
207 }
208 #endif
209
210 static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
211 {
212 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
213 if (dmastat & DMASCR_ANY_ERR)
214 printk(KERN_CONT "ANY_ERR ");
215 if (dmastat & DMASCR_MBE_ERR)
216 printk(KERN_CONT "MBE_ERR ");
217 if (dmastat & DMASCR_PARITY_ERR_REP)
218 printk(KERN_CONT "PARITY_ERR_REP ");
219 if (dmastat & DMASCR_PARITY_ERR_DET)
220 printk(KERN_CONT "PARITY_ERR_DET ");
221 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
222 printk(KERN_CONT "SYSTEM_ERR_SIG ");
223 if (dmastat & DMASCR_TARGET_ABT)
224 printk(KERN_CONT "TARGET_ABT ");
225 if (dmastat & DMASCR_MASTER_ABT)
226 printk(KERN_CONT "MASTER_ABT ");
227 if (dmastat & DMASCR_CHAIN_COMPLETE)
228 printk(KERN_CONT "CHAIN_COMPLETE ");
229 if (dmastat & DMASCR_DMA_COMPLETE)
230 printk(KERN_CONT "DMA_COMPLETE ");
231 printk("\n");
232 }
233
234 /*
235 * Theory of request handling
236 *
237 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
238 * We have two pages of mm_dma_desc, holding about 64 descriptors
239 * each. These are allocated at init time.
240 * One page is "Ready" and is either full, or can have request added.
241 * The other page might be "Active", which DMA is happening on it.
242 *
243 * Whenever IO on the active page completes, the Ready page is activated
244 * and the ex-Active page is clean out and made Ready.
245 * Otherwise the Ready page is only activated when it becomes full, or
246 * when mm_unplug_device is called via the unplug_io_fn.
247 *
248 * If a request arrives while both pages a full, it is queued, and b_rdev is
249 * overloaded to record whether it was a read or a write.
250 *
251 * The interrupt handler only polls the device to clear the interrupt.
252 * The processing of the result is done in a tasklet.
253 */
254
255 static void mm_start_io(struct cardinfo *card)
256 {
257 /* we have the lock, we know there is
258 * no IO active, and we know that card->Active
259 * is set
260 */
261 struct mm_dma_desc *desc;
262 struct mm_page *page;
263 int offset;
264
265 /* make the last descriptor end the chain */
266 page = &card->mm_pages[card->Active];
267 pr_debug("start_io: %d %d->%d\n",
268 card->Active, page->headcnt, page->cnt - 1);
269 desc = &page->desc[page->cnt-1];
270
271 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
272 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
273 desc->sem_control_bits = desc->control_bits;
274
275
276 if (debug & DEBUG_LED_ON_TRANSFER)
277 set_led(card, LED_REMOVE, LED_ON);
278
279 desc = &page->desc[page->headcnt];
280 writel(0, card->csr_remap + DMA_PCI_ADDR);
281 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
282
283 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
284 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
285
286 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
287 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
288
289 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
290 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
291
292 offset = ((char *)desc) - ((char *)page->desc);
293 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
294 card->csr_remap + DMA_DESCRIPTOR_ADDR);
295 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
296 * and on some ports will do nothing ! */
297 writel(cpu_to_le32(((u64)page->page_dma)>>32),
298 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
299
300 /* Go, go, go */
301 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
302 card->csr_remap + DMA_STATUS_CTRL);
303 }
304
305 static int add_bio(struct cardinfo *card);
306
307 static void activate(struct cardinfo *card)
308 {
309 /* if No page is Active, and Ready is
310 * not empty, then switch Ready page
311 * to active and start IO.
312 * Then add any bh's that are available to Ready
313 */
314
315 do {
316 while (add_bio(card))
317 ;
318
319 if (card->Active == -1 &&
320 card->mm_pages[card->Ready].cnt > 0) {
321 card->Active = card->Ready;
322 card->Ready = 1-card->Ready;
323 mm_start_io(card);
324 }
325
326 } while (card->Active == -1 && add_bio(card));
327 }
328
329 static inline void reset_page(struct mm_page *page)
330 {
331 page->cnt = 0;
332 page->headcnt = 0;
333 page->bio = NULL;
334 page->biotail = &page->bio;
335 }
336
337 static void mm_unplug_device(struct request_queue *q)
338 {
339 struct cardinfo *card = q->queuedata;
340 unsigned long flags;
341
342 spin_lock_irqsave(&card->lock, flags);
343 if (blk_remove_plug(q))
344 activate(card);
345 spin_unlock_irqrestore(&card->lock, flags);
346 }
347
348 /*
349 * If there is room on Ready page, take
350 * one bh off list and add it.
351 * return 1 if there was room, else 0.
352 */
353 static int add_bio(struct cardinfo *card)
354 {
355 struct mm_page *p;
356 struct mm_dma_desc *desc;
357 dma_addr_t dma_handle;
358 int offset;
359 struct bio *bio;
360 struct bio_vec *vec;
361 int idx;
362 int rw;
363 int len;
364
365 bio = card->currentbio;
366 if (!bio && card->bio) {
367 card->currentbio = card->bio;
368 card->current_idx = card->bio->bi_idx;
369 card->current_sector = card->bio->bi_sector;
370 card->bio = card->bio->bi_next;
371 if (card->bio == NULL)
372 card->biotail = &card->bio;
373 card->currentbio->bi_next = NULL;
374 return 1;
375 }
376 if (!bio)
377 return 0;
378 idx = card->current_idx;
379
380 rw = bio_rw(bio);
381 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
382 return 0;
383
384 vec = bio_iovec_idx(bio, idx);
385 len = vec->bv_len;
386 dma_handle = pci_map_page(card->dev,
387 vec->bv_page,
388 vec->bv_offset,
389 len,
390 (rw == READ) ?
391 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
392
393 p = &card->mm_pages[card->Ready];
394 desc = &p->desc[p->cnt];
395 p->cnt++;
396 if (p->bio == NULL)
397 p->idx = idx;
398 if ((p->biotail) != &bio->bi_next) {
399 *(p->biotail) = bio;
400 p->biotail = &(bio->bi_next);
401 bio->bi_next = NULL;
402 }
403
404 desc->data_dma_handle = dma_handle;
405
406 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
407 desc->local_addr = cpu_to_le64(card->current_sector << 9);
408 desc->transfer_size = cpu_to_le32(len);
409 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
410 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
411 desc->zero1 = desc->zero2 = 0;
412 offset = (((char *)(desc+1)) - ((char *)p->desc));
413 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
414 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
415 DMASCR_PARITY_INT_EN|
416 DMASCR_CHAIN_EN |
417 DMASCR_SEM_EN |
418 pci_cmds);
419 if (rw == WRITE)
420 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
421 desc->sem_control_bits = desc->control_bits;
422
423 card->current_sector += (len >> 9);
424 idx++;
425 card->current_idx = idx;
426 if (idx >= bio->bi_vcnt)
427 card->currentbio = NULL;
428
429 return 1;
430 }
431
432 static void process_page(unsigned long data)
433 {
434 /* check if any of the requests in the page are DMA_COMPLETE,
435 * and deal with them appropriately.
436 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
437 * dma must have hit an error on that descriptor, so use dma_status
438 * instead and assume that all following descriptors must be re-tried.
439 */
440 struct mm_page *page;
441 struct bio *return_bio = NULL;
442 struct cardinfo *card = (struct cardinfo *)data;
443 unsigned int dma_status = card->dma_status;
444
445 spin_lock_bh(&card->lock);
446 if (card->Active < 0)
447 goto out_unlock;
448 page = &card->mm_pages[card->Active];
449
450 while (page->headcnt < page->cnt) {
451 struct bio *bio = page->bio;
452 struct mm_dma_desc *desc = &page->desc[page->headcnt];
453 int control = le32_to_cpu(desc->sem_control_bits);
454 int last = 0;
455 int idx;
456
457 if (!(control & DMASCR_DMA_COMPLETE)) {
458 control = dma_status;
459 last = 1;
460 }
461 page->headcnt++;
462 idx = page->idx;
463 page->idx++;
464 if (page->idx >= bio->bi_vcnt) {
465 page->bio = bio->bi_next;
466 if (page->bio)
467 page->idx = page->bio->bi_idx;
468 }
469
470 pci_unmap_page(card->dev, desc->data_dma_handle,
471 bio_iovec_idx(bio, idx)->bv_len,
472 (control & DMASCR_TRANSFER_READ) ?
473 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
474 if (control & DMASCR_HARD_ERROR) {
475 /* error */
476 clear_bit(BIO_UPTODATE, &bio->bi_flags);
477 dev_printk(KERN_WARNING, &card->dev->dev,
478 "I/O error on sector %d/%d\n",
479 le32_to_cpu(desc->local_addr)>>9,
480 le32_to_cpu(desc->transfer_size));
481 dump_dmastat(card, control);
482 } else if (test_bit(BIO_RW, &bio->bi_rw) &&
483 le32_to_cpu(desc->local_addr) >> 9 ==
484 card->init_size) {
485 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
486 if (card->init_size >> 1 >= card->mm_size) {
487 dev_printk(KERN_INFO, &card->dev->dev,
488 "memory now initialised\n");
489 set_userbit(card, MEMORY_INITIALIZED, 1);
490 }
491 }
492 if (bio != page->bio) {
493 bio->bi_next = return_bio;
494 return_bio = bio;
495 }
496
497 if (last)
498 break;
499 }
500
501 if (debug & DEBUG_LED_ON_TRANSFER)
502 set_led(card, LED_REMOVE, LED_OFF);
503
504 if (card->check_batteries) {
505 card->check_batteries = 0;
506 check_batteries(card);
507 }
508 if (page->headcnt >= page->cnt) {
509 reset_page(page);
510 card->Active = -1;
511 activate(card);
512 } else {
513 /* haven't finished with this one yet */
514 pr_debug("do some more\n");
515 mm_start_io(card);
516 }
517 out_unlock:
518 spin_unlock_bh(&card->lock);
519
520 while (return_bio) {
521 struct bio *bio = return_bio;
522
523 return_bio = bio->bi_next;
524 bio->bi_next = NULL;
525 bio_endio(bio, 0);
526 }
527 }
528
529 static int mm_make_request(struct request_queue *q, struct bio *bio)
530 {
531 struct cardinfo *card = q->queuedata;
532 pr_debug("mm_make_request %llu %u\n",
533 (unsigned long long)bio->bi_sector, bio->bi_size);
534
535 spin_lock_irq(&card->lock);
536 *card->biotail = bio;
537 bio->bi_next = NULL;
538 card->biotail = &bio->bi_next;
539 blk_plug_device(q);
540 spin_unlock_irq(&card->lock);
541
542 return 0;
543 }
544
545 static irqreturn_t mm_interrupt(int irq, void *__card)
546 {
547 struct cardinfo *card = (struct cardinfo *) __card;
548 unsigned int dma_status;
549 unsigned short cfg_status;
550
551 HW_TRACE(0x30);
552
553 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
554
555 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
556 /* interrupt wasn't for me ... */
557 return IRQ_NONE;
558 }
559
560 /* clear COMPLETION interrupts */
561 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
562 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
563 card->csr_remap + DMA_STATUS_CTRL);
564 else
565 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
566 card->csr_remap + DMA_STATUS_CTRL + 2);
567
568 /* log errors and clear interrupt status */
569 if (dma_status & DMASCR_ANY_ERR) {
570 unsigned int data_log1, data_log2;
571 unsigned int addr_log1, addr_log2;
572 unsigned char stat, count, syndrome, check;
573
574 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
575
576 data_log1 = le32_to_cpu(readl(card->csr_remap +
577 ERROR_DATA_LOG));
578 data_log2 = le32_to_cpu(readl(card->csr_remap +
579 ERROR_DATA_LOG + 4));
580 addr_log1 = le32_to_cpu(readl(card->csr_remap +
581 ERROR_ADDR_LOG));
582 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
583
584 count = readb(card->csr_remap + ERROR_COUNT);
585 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
586 check = readb(card->csr_remap + ERROR_CHECK);
587
588 dump_dmastat(card, dma_status);
589
590 if (stat & 0x01)
591 dev_printk(KERN_ERR, &card->dev->dev,
592 "Memory access error detected (err count %d)\n",
593 count);
594 if (stat & 0x02)
595 dev_printk(KERN_ERR, &card->dev->dev,
596 "Multi-bit EDC error\n");
597
598 dev_printk(KERN_ERR, &card->dev->dev,
599 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
600 addr_log2, addr_log1, data_log2, data_log1);
601 dev_printk(KERN_ERR, &card->dev->dev,
602 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
603 check, syndrome);
604
605 writeb(0, card->csr_remap + ERROR_COUNT);
606 }
607
608 if (dma_status & DMASCR_PARITY_ERR_REP) {
609 dev_printk(KERN_ERR, &card->dev->dev,
610 "PARITY ERROR REPORTED\n");
611 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
612 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
613 }
614
615 if (dma_status & DMASCR_PARITY_ERR_DET) {
616 dev_printk(KERN_ERR, &card->dev->dev,
617 "PARITY ERROR DETECTED\n");
618 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
619 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
620 }
621
622 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
623 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
624 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
625 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
626 }
627
628 if (dma_status & DMASCR_TARGET_ABT) {
629 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
630 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
631 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
632 }
633
634 if (dma_status & DMASCR_MASTER_ABT) {
635 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
636 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
637 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
638 }
639
640 /* and process the DMA descriptors */
641 card->dma_status = dma_status;
642 tasklet_schedule(&card->tasklet);
643
644 HW_TRACE(0x36);
645
646 return IRQ_HANDLED;
647 }
648
649 /*
650 * If both batteries are good, no LED
651 * If either battery has been warned, solid LED
652 * If both batteries are bad, flash the LED quickly
653 * If either battery is bad, flash the LED semi quickly
654 */
655 static void set_fault_to_battery_status(struct cardinfo *card)
656 {
657 if (card->battery[0].good && card->battery[1].good)
658 set_led(card, LED_FAULT, LED_OFF);
659 else if (card->battery[0].warned || card->battery[1].warned)
660 set_led(card, LED_FAULT, LED_ON);
661 else if (!card->battery[0].good && !card->battery[1].good)
662 set_led(card, LED_FAULT, LED_FLASH_7_0);
663 else
664 set_led(card, LED_FAULT, LED_FLASH_3_5);
665 }
666
667 static void init_battery_timer(void);
668
669 static int check_battery(struct cardinfo *card, int battery, int status)
670 {
671 if (status != card->battery[battery].good) {
672 card->battery[battery].good = !card->battery[battery].good;
673 card->battery[battery].last_change = jiffies;
674
675 if (card->battery[battery].good) {
676 dev_printk(KERN_ERR, &card->dev->dev,
677 "Battery %d now good\n", battery + 1);
678 card->battery[battery].warned = 0;
679 } else
680 dev_printk(KERN_ERR, &card->dev->dev,
681 "Battery %d now FAILED\n", battery + 1);
682
683 return 1;
684 } else if (!card->battery[battery].good &&
685 !card->battery[battery].warned &&
686 time_after_eq(jiffies, card->battery[battery].last_change +
687 (HZ * 60 * 60 * 5))) {
688 dev_printk(KERN_ERR, &card->dev->dev,
689 "Battery %d still FAILED after 5 hours\n", battery + 1);
690 card->battery[battery].warned = 1;
691
692 return 1;
693 }
694
695 return 0;
696 }
697
698 static void check_batteries(struct cardinfo *card)
699 {
700 /* NOTE: this must *never* be called while the card
701 * is doing (bus-to-card) DMA, or you will need the
702 * reset switch
703 */
704 unsigned char status;
705 int ret1, ret2;
706
707 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
708 if (debug & DEBUG_BATTERY_POLLING)
709 dev_printk(KERN_DEBUG, &card->dev->dev,
710 "checking battery status, 1 = %s, 2 = %s\n",
711 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
712 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
713
714 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
715 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
716
717 if (ret1 || ret2)
718 set_fault_to_battery_status(card);
719 }
720
721 static void check_all_batteries(unsigned long ptr)
722 {
723 int i;
724
725 for (i = 0; i < num_cards; i++)
726 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
727 struct cardinfo *card = &cards[i];
728 spin_lock_bh(&card->lock);
729 if (card->Active >= 0)
730 card->check_batteries = 1;
731 else
732 check_batteries(card);
733 spin_unlock_bh(&card->lock);
734 }
735
736 init_battery_timer();
737 }
738
739 static void init_battery_timer(void)
740 {
741 init_timer(&battery_timer);
742 battery_timer.function = check_all_batteries;
743 battery_timer.expires = jiffies + (HZ * 60);
744 add_timer(&battery_timer);
745 }
746
747 static void del_battery_timer(void)
748 {
749 del_timer(&battery_timer);
750 }
751
752 /*
753 * Note no locks taken out here. In a worst case scenario, we could drop
754 * a chunk of system memory. But that should never happen, since validation
755 * happens at open or mount time, when locks are held.
756 *
757 * That's crap, since doing that while some partitions are opened
758 * or mounted will give you really nasty results.
759 */
760 static int mm_revalidate(struct gendisk *disk)
761 {
762 struct cardinfo *card = disk->private_data;
763 set_capacity(disk, card->mm_size << 1);
764 return 0;
765 }
766
767 static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
768 {
769 struct cardinfo *card = bdev->bd_disk->private_data;
770 int size = card->mm_size * (1024 / MM_HARDSECT);
771
772 /*
773 * get geometry: we have to fake one... trim the size to a
774 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
775 * whatever cylinders.
776 */
777 geo->heads = 64;
778 geo->sectors = 32;
779 geo->cylinders = size / (geo->heads * geo->sectors);
780 return 0;
781 }
782
783 /*
784 * Future support for removable devices
785 */
786 static int mm_check_change(struct gendisk *disk)
787 {
788 /* struct cardinfo *dev = disk->private_data; */
789 return 0;
790 }
791
792 static struct block_device_operations mm_fops = {
793 .owner = THIS_MODULE,
794 .getgeo = mm_getgeo,
795 .revalidate_disk = mm_revalidate,
796 .media_changed = mm_check_change,
797 };
798
799 static int __devinit mm_pci_probe(struct pci_dev *dev,
800 const struct pci_device_id *id)
801 {
802 int ret = -ENODEV;
803 struct cardinfo *card = &cards[num_cards];
804 unsigned char mem_present;
805 unsigned char batt_status;
806 unsigned int saved_bar, data;
807 unsigned long csr_base;
808 unsigned long csr_len;
809 int magic_number;
810 static int printed_version;
811
812 if (!printed_version++)
813 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
814
815 ret = pci_enable_device(dev);
816 if (ret)
817 return ret;
818
819 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
820 pci_set_master(dev);
821
822 card->dev = dev;
823
824 csr_base = pci_resource_start(dev, 0);
825 csr_len = pci_resource_len(dev, 0);
826 if (!csr_base || !csr_len)
827 return -ENODEV;
828
829 dev_printk(KERN_INFO, &dev->dev,
830 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
831
832 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
833 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
834 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
835 return -ENOMEM;
836 }
837
838 ret = pci_request_regions(dev, DRIVER_NAME);
839 if (ret) {
840 dev_printk(KERN_ERR, &card->dev->dev,
841 "Unable to request memory region\n");
842 goto failed_req_csr;
843 }
844
845 card->csr_remap = ioremap_nocache(csr_base, csr_len);
846 if (!card->csr_remap) {
847 dev_printk(KERN_ERR, &card->dev->dev,
848 "Unable to remap memory region\n");
849 ret = -ENOMEM;
850
851 goto failed_remap_csr;
852 }
853
854 dev_printk(KERN_INFO, &card->dev->dev,
855 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
856 csr_base, card->csr_remap, csr_len);
857
858 switch (card->dev->device) {
859 case 0x5415:
860 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
861 magic_number = 0x59;
862 break;
863
864 case 0x5425:
865 card->flags |= UM_FLAG_NO_BYTE_STATUS;
866 magic_number = 0x5C;
867 break;
868
869 case 0x6155:
870 card->flags |= UM_FLAG_NO_BYTE_STATUS |
871 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
872 magic_number = 0x99;
873 break;
874
875 default:
876 magic_number = 0x100;
877 break;
878 }
879
880 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
881 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
882 ret = -ENOMEM;
883 goto failed_magic;
884 }
885
886 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
887 PAGE_SIZE * 2,
888 &card->mm_pages[0].page_dma);
889 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
890 PAGE_SIZE * 2,
891 &card->mm_pages[1].page_dma);
892 if (card->mm_pages[0].desc == NULL ||
893 card->mm_pages[1].desc == NULL) {
894 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
895 goto failed_alloc;
896 }
897 reset_page(&card->mm_pages[0]);
898 reset_page(&card->mm_pages[1]);
899 card->Ready = 0; /* page 0 is ready */
900 card->Active = -1; /* no page is active */
901 card->bio = NULL;
902 card->biotail = &card->bio;
903
904 card->queue = blk_alloc_queue(GFP_KERNEL);
905 if (!card->queue)
906 goto failed_alloc;
907
908 blk_queue_make_request(card->queue, mm_make_request);
909 card->queue->queue_lock = &card->lock;
910 card->queue->queuedata = card;
911 card->queue->unplug_fn = mm_unplug_device;
912
913 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
914
915 card->check_batteries = 0;
916
917 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
918 switch (mem_present) {
919 case MEM_128_MB:
920 card->mm_size = 1024 * 128;
921 break;
922 case MEM_256_MB:
923 card->mm_size = 1024 * 256;
924 break;
925 case MEM_512_MB:
926 card->mm_size = 1024 * 512;
927 break;
928 case MEM_1_GB:
929 card->mm_size = 1024 * 1024;
930 break;
931 case MEM_2_GB:
932 card->mm_size = 1024 * 2048;
933 break;
934 default:
935 card->mm_size = 0;
936 break;
937 }
938
939 /* Clear the LED's we control */
940 set_led(card, LED_REMOVE, LED_OFF);
941 set_led(card, LED_FAULT, LED_OFF);
942
943 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
944
945 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
946 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
947 card->battery[0].last_change = card->battery[1].last_change = jiffies;
948
949 if (card->flags & UM_FLAG_NO_BATT)
950 dev_printk(KERN_INFO, &card->dev->dev,
951 "Size %d KB\n", card->mm_size);
952 else {
953 dev_printk(KERN_INFO, &card->dev->dev,
954 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
955 card->mm_size,
956 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
957 card->battery[0].good ? "OK" : "FAILURE",
958 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
959 card->battery[1].good ? "OK" : "FAILURE");
960
961 set_fault_to_battery_status(card);
962 }
963
964 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
965 data = 0xffffffff;
966 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
967 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
968 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
969 data &= 0xfffffff0;
970 data = ~data;
971 data += 1;
972
973 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
974 card)) {
975 dev_printk(KERN_ERR, &card->dev->dev,
976 "Unable to allocate IRQ\n");
977 ret = -ENODEV;
978 goto failed_req_irq;
979 }
980
981 dev_printk(KERN_INFO, &card->dev->dev,
982 "Window size %d bytes, IRQ %d\n", data, dev->irq);
983
984 spin_lock_init(&card->lock);
985
986 pci_set_drvdata(dev, card);
987
988 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
989 pci_write_cmd = 0x07; /* then Memory Write command */
990
991 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
992 unsigned short cfg_command;
993 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
994 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
995 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
996 }
997 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
998
999 num_cards++;
1000
1001 if (!get_userbit(card, MEMORY_INITIALIZED)) {
1002 dev_printk(KERN_INFO, &card->dev->dev,
1003 "memory NOT initialized. Consider over-writing whole device.\n");
1004 card->init_size = 0;
1005 } else {
1006 dev_printk(KERN_INFO, &card->dev->dev,
1007 "memory already initialized\n");
1008 card->init_size = card->mm_size;
1009 }
1010
1011 /* Enable ECC */
1012 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
1013
1014 return 0;
1015
1016 failed_req_irq:
1017 failed_alloc:
1018 if (card->mm_pages[0].desc)
1019 pci_free_consistent(card->dev, PAGE_SIZE*2,
1020 card->mm_pages[0].desc,
1021 card->mm_pages[0].page_dma);
1022 if (card->mm_pages[1].desc)
1023 pci_free_consistent(card->dev, PAGE_SIZE*2,
1024 card->mm_pages[1].desc,
1025 card->mm_pages[1].page_dma);
1026 failed_magic:
1027 iounmap(card->csr_remap);
1028 failed_remap_csr:
1029 pci_release_regions(dev);
1030 failed_req_csr:
1031
1032 return ret;
1033 }
1034
1035 static void mm_pci_remove(struct pci_dev *dev)
1036 {
1037 struct cardinfo *card = pci_get_drvdata(dev);
1038
1039 tasklet_kill(&card->tasklet);
1040 free_irq(dev->irq, card);
1041 iounmap(card->csr_remap);
1042
1043 if (card->mm_pages[0].desc)
1044 pci_free_consistent(card->dev, PAGE_SIZE*2,
1045 card->mm_pages[0].desc,
1046 card->mm_pages[0].page_dma);
1047 if (card->mm_pages[1].desc)
1048 pci_free_consistent(card->dev, PAGE_SIZE*2,
1049 card->mm_pages[1].desc,
1050 card->mm_pages[1].page_dma);
1051 blk_cleanup_queue(card->queue);
1052
1053 pci_release_regions(dev);
1054 pci_disable_device(dev);
1055 }
1056
1057 static const struct pci_device_id mm_pci_ids[] = {
1058 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1059 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1060 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
1061 {
1062 .vendor = 0x8086,
1063 .device = 0xB555,
1064 .subvendor = 0x1332,
1065 .subdevice = 0x5460,
1066 .class = 0x050000,
1067 .class_mask = 0,
1068 }, { /* end: all zeroes */ }
1069 };
1070
1071 MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1072
1073 static struct pci_driver mm_pci_driver = {
1074 .name = DRIVER_NAME,
1075 .id_table = mm_pci_ids,
1076 .probe = mm_pci_probe,
1077 .remove = mm_pci_remove,
1078 };
1079
1080 static int __init mm_init(void)
1081 {
1082 int retval, i;
1083 int err;
1084
1085 retval = pci_register_driver(&mm_pci_driver);
1086 if (retval)
1087 return -ENOMEM;
1088
1089 err = major_nr = register_blkdev(0, DRIVER_NAME);
1090 if (err < 0) {
1091 pci_unregister_driver(&mm_pci_driver);
1092 return -EIO;
1093 }
1094
1095 for (i = 0; i < num_cards; i++) {
1096 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1097 if (!mm_gendisk[i])
1098 goto out;
1099 }
1100
1101 for (i = 0; i < num_cards; i++) {
1102 struct gendisk *disk = mm_gendisk[i];
1103 sprintf(disk->disk_name, "umem%c", 'a'+i);
1104 spin_lock_init(&cards[i].lock);
1105 disk->major = major_nr;
1106 disk->first_minor = i << MM_SHIFT;
1107 disk->fops = &mm_fops;
1108 disk->private_data = &cards[i];
1109 disk->queue = cards[i].queue;
1110 set_capacity(disk, cards[i].mm_size << 1);
1111 add_disk(disk);
1112 }
1113
1114 init_battery_timer();
1115 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1116 /* printk("mm_init: Done. 10-19-01 9:00\n"); */
1117 return 0;
1118
1119 out:
1120 pci_unregister_driver(&mm_pci_driver);
1121 unregister_blkdev(major_nr, DRIVER_NAME);
1122 while (i--)
1123 put_disk(mm_gendisk[i]);
1124 return -ENOMEM;
1125 }
1126
1127 static void __exit mm_cleanup(void)
1128 {
1129 int i;
1130
1131 del_battery_timer();
1132
1133 for (i = 0; i < num_cards ; i++) {
1134 del_gendisk(mm_gendisk[i]);
1135 put_disk(mm_gendisk[i]);
1136 }
1137
1138 pci_unregister_driver(&mm_pci_driver);
1139
1140 unregister_blkdev(major_nr, DRIVER_NAME);
1141 }
1142
1143 module_init(mm_init);
1144 module_exit(mm_cleanup);
1145
1146 MODULE_AUTHOR(DRIVER_AUTHOR);
1147 MODULE_DESCRIPTION(DRIVER_DESC);
1148 MODULE_LICENSE("GPL");
connection oriented routing - ARCHIVE NO UPDATES HERE