2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/types.h>
14 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
23 #include <linux/i8042.h>
27 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
28 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
29 MODULE_LICENSE("GPL");
31 static unsigned int i8042_nokbd
;
32 module_param_named(nokbd
, i8042_nokbd
, bool, 0);
33 MODULE_PARM_DESC(nokbd
, "Do not probe or use KBD port.");
35 static unsigned int i8042_noaux
;
36 module_param_named(noaux
, i8042_noaux
, bool, 0);
37 MODULE_PARM_DESC(noaux
, "Do not probe or use AUX (mouse) port.");
39 static unsigned int i8042_nomux
;
40 module_param_named(nomux
, i8042_nomux
, bool, 0);
41 MODULE_PARM_DESC(nomux
, "Do not check whether an active multiplexing conrtoller is present.");
43 static unsigned int i8042_unlock
;
44 module_param_named(unlock
, i8042_unlock
, bool, 0);
45 MODULE_PARM_DESC(unlock
, "Ignore keyboard lock.");
47 static unsigned int i8042_reset
;
48 module_param_named(reset
, i8042_reset
, bool, 0);
49 MODULE_PARM_DESC(reset
, "Reset controller during init and cleanup.");
51 static unsigned int i8042_direct
;
52 module_param_named(direct
, i8042_direct
, bool, 0);
53 MODULE_PARM_DESC(direct
, "Put keyboard port into non-translated mode.");
55 static unsigned int i8042_dumbkbd
;
56 module_param_named(dumbkbd
, i8042_dumbkbd
, bool, 0);
57 MODULE_PARM_DESC(dumbkbd
, "Pretend that controller can only read data from keyboard");
59 static unsigned int i8042_noloop
;
60 module_param_named(noloop
, i8042_noloop
, bool, 0);
61 MODULE_PARM_DESC(noloop
, "Disable the AUX Loopback command while probing for the AUX port");
63 static unsigned int i8042_blink_frequency
= 500;
64 module_param_named(panicblink
, i8042_blink_frequency
, uint
, 0600);
65 MODULE_PARM_DESC(panicblink
, "Frequency with which keyboard LEDs should blink when kernel panics");
68 static unsigned int i8042_dritek
;
69 module_param_named(dritek
, i8042_dritek
, bool, 0);
70 MODULE_PARM_DESC(dritek
, "Force enable the Dritek keyboard extension");
74 static int i8042_nopnp
;
75 module_param_named(nopnp
, i8042_nopnp
, bool, 0);
76 MODULE_PARM_DESC(nopnp
, "Do not use PNP to detect controller settings");
81 static int i8042_debug
;
82 module_param_named(debug
, i8042_debug
, bool, 0600);
83 MODULE_PARM_DESC(debug
, "Turn i8042 debugging mode on and off");
88 static DEFINE_SPINLOCK(i8042_lock
);
97 #define I8042_KBD_PORT_NO 0
98 #define I8042_AUX_PORT_NO 1
99 #define I8042_MUX_PORT_NO 2
100 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
102 static struct i8042_port i8042_ports
[I8042_NUM_PORTS
];
104 static unsigned char i8042_initial_ctr
;
105 static unsigned char i8042_ctr
;
106 static unsigned char i8042_mux_present
;
107 static unsigned char i8042_kbd_irq_registered
;
108 static unsigned char i8042_aux_irq_registered
;
109 static unsigned char i8042_suppress_kbd_ack
;
110 static struct platform_device
*i8042_platform_device
;
112 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
);
115 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
116 * be ready for reading values from it / writing values to it.
117 * Called always with i8042_lock held.
120 static int i8042_wait_read(void)
124 while ((~i8042_read_status() & I8042_STR_OBF
) && (i
< I8042_CTL_TIMEOUT
)) {
128 return -(i
== I8042_CTL_TIMEOUT
);
131 static int i8042_wait_write(void)
135 while ((i8042_read_status() & I8042_STR_IBF
) && (i
< I8042_CTL_TIMEOUT
)) {
139 return -(i
== I8042_CTL_TIMEOUT
);
143 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
144 * of the i8042 down the toilet.
147 static int i8042_flush(void)
150 unsigned char data
, str
;
153 spin_lock_irqsave(&i8042_lock
, flags
);
155 while (((str
= i8042_read_status()) & I8042_STR_OBF
) && (i
< I8042_BUFFER_SIZE
)) {
157 data
= i8042_read_data();
159 dbg("%02x <- i8042 (flush, %s)", data
,
160 str
& I8042_STR_AUXDATA
? "aux" : "kbd");
163 spin_unlock_irqrestore(&i8042_lock
, flags
);
169 * i8042_command() executes a command on the i8042. It also sends the input
170 * parameter(s) of the commands to it, and receives the output value(s). The
171 * parameters are to be stored in the param array, and the output is placed
172 * into the same array. The number of the parameters and output values is
173 * encoded in bits 8-11 of the command number.
176 static int __i8042_command(unsigned char *param
, int command
)
180 if (i8042_noloop
&& command
== I8042_CMD_AUX_LOOP
)
183 error
= i8042_wait_write();
187 dbg("%02x -> i8042 (command)", command
& 0xff);
188 i8042_write_command(command
& 0xff);
190 for (i
= 0; i
< ((command
>> 12) & 0xf); i
++) {
191 error
= i8042_wait_write();
194 dbg("%02x -> i8042 (parameter)", param
[i
]);
195 i8042_write_data(param
[i
]);
198 for (i
= 0; i
< ((command
>> 8) & 0xf); i
++) {
199 error
= i8042_wait_read();
201 dbg(" -- i8042 (timeout)");
205 if (command
== I8042_CMD_AUX_LOOP
&&
206 !(i8042_read_status() & I8042_STR_AUXDATA
)) {
207 dbg(" -- i8042 (auxerr)");
211 param
[i
] = i8042_read_data();
212 dbg("%02x <- i8042 (return)", param
[i
]);
218 int i8042_command(unsigned char *param
, int command
)
223 spin_lock_irqsave(&i8042_lock
, flags
);
224 retval
= __i8042_command(param
, command
);
225 spin_unlock_irqrestore(&i8042_lock
, flags
);
229 EXPORT_SYMBOL(i8042_command
);
232 * i8042_kbd_write() sends a byte out through the keyboard interface.
235 static int i8042_kbd_write(struct serio
*port
, unsigned char c
)
240 spin_lock_irqsave(&i8042_lock
, flags
);
242 if (!(retval
= i8042_wait_write())) {
243 dbg("%02x -> i8042 (kbd-data)", c
);
247 spin_unlock_irqrestore(&i8042_lock
, flags
);
253 * i8042_aux_write() sends a byte out through the aux interface.
256 static int i8042_aux_write(struct serio
*serio
, unsigned char c
)
258 struct i8042_port
*port
= serio
->port_data
;
260 return i8042_command(&c
, port
->mux
== -1 ?
262 I8042_CMD_MUX_SEND
+ port
->mux
);
266 * i8042_start() is called by serio core when port is about to finish
267 * registering. It will mark port as existing so i8042_interrupt can
268 * start sending data through it.
270 static int i8042_start(struct serio
*serio
)
272 struct i8042_port
*port
= serio
->port_data
;
280 * i8042_stop() marks serio port as non-existing so i8042_interrupt
281 * will not try to send data to the port that is about to go away.
282 * The function is called by serio core as part of unregister procedure.
284 static void i8042_stop(struct serio
*serio
)
286 struct i8042_port
*port
= serio
->port_data
;
291 * We synchronize with both AUX and KBD IRQs because there is
292 * a (very unlikely) chance that AUX IRQ is raised for KBD port
295 synchronize_irq(I8042_AUX_IRQ
);
296 synchronize_irq(I8042_KBD_IRQ
);
301 * i8042_interrupt() is the most important function in this driver -
302 * it handles the interrupts from the i8042, and sends incoming bytes
303 * to the upper layers.
306 static irqreturn_t
i8042_interrupt(int irq
, void *dev_id
)
308 struct i8042_port
*port
;
310 unsigned char str
, data
;
312 unsigned int port_no
;
315 spin_lock_irqsave(&i8042_lock
, flags
);
316 str
= i8042_read_status();
317 if (unlikely(~str
& I8042_STR_OBF
)) {
318 spin_unlock_irqrestore(&i8042_lock
, flags
);
319 if (irq
) dbg("Interrupt %d, without any data", irq
);
323 data
= i8042_read_data();
324 spin_unlock_irqrestore(&i8042_lock
, flags
);
326 if (i8042_mux_present
&& (str
& I8042_STR_AUXDATA
)) {
327 static unsigned long last_transmit
;
328 static unsigned char last_str
;
331 if (str
& I8042_STR_MUXERR
) {
332 dbg("MUX error, status is %02x, data is %02x", str
, data
);
334 * When MUXERR condition is signalled the data register can only contain
335 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
336 * it is not always the case. Some KBCs also report 0xfc when there is
337 * nothing connected to the port while others sometimes get confused which
338 * port the data came from and signal error leaving the data intact. They
339 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
340 * to legacy mode yet, when we see one we'll add proper handling).
341 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
342 * rest assume that the data came from the same serio last byte
343 * was transmitted (if transmission happened not too long ago).
348 if (time_before(jiffies
, last_transmit
+ HZ
/10)) {
352 /* fall through - report timeout */
355 case 0xfe: dfl
= SERIO_TIMEOUT
; data
= 0xfe; break;
356 case 0xff: dfl
= SERIO_PARITY
; data
= 0xfe; break;
360 port_no
= I8042_MUX_PORT_NO
+ ((str
>> 6) & 3);
362 last_transmit
= jiffies
;
365 dfl
= ((str
& I8042_STR_PARITY
) ? SERIO_PARITY
: 0) |
366 ((str
& I8042_STR_TIMEOUT
) ? SERIO_TIMEOUT
: 0);
368 port_no
= (str
& I8042_STR_AUXDATA
) ?
369 I8042_AUX_PORT_NO
: I8042_KBD_PORT_NO
;
372 port
= &i8042_ports
[port_no
];
374 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
376 dfl
& SERIO_PARITY
? ", bad parity" : "",
377 dfl
& SERIO_TIMEOUT
? ", timeout" : "");
379 if (unlikely(i8042_suppress_kbd_ack
))
380 if (port_no
== I8042_KBD_PORT_NO
&&
381 (data
== 0xfa || data
== 0xfe)) {
382 i8042_suppress_kbd_ack
--;
386 if (likely(port
->exists
))
387 serio_interrupt(port
->serio
, data
, dfl
);
390 return IRQ_RETVAL(ret
);
394 * i8042_enable_kbd_port enables keybaord port on chip
397 static int i8042_enable_kbd_port(void)
399 i8042_ctr
&= ~I8042_CTR_KBDDIS
;
400 i8042_ctr
|= I8042_CTR_KBDINT
;
402 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
403 i8042_ctr
&= ~I8042_CTR_KBDINT
;
404 i8042_ctr
|= I8042_CTR_KBDDIS
;
405 printk(KERN_ERR
"i8042.c: Failed to enable KBD port.\n");
413 * i8042_enable_aux_port enables AUX (mouse) port on chip
416 static int i8042_enable_aux_port(void)
418 i8042_ctr
&= ~I8042_CTR_AUXDIS
;
419 i8042_ctr
|= I8042_CTR_AUXINT
;
421 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
422 i8042_ctr
&= ~I8042_CTR_AUXINT
;
423 i8042_ctr
|= I8042_CTR_AUXDIS
;
424 printk(KERN_ERR
"i8042.c: Failed to enable AUX port.\n");
432 * i8042_enable_mux_ports enables 4 individual AUX ports after
433 * the controller has been switched into Multiplexed mode
436 static int i8042_enable_mux_ports(void)
441 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
442 i8042_command(¶m
, I8042_CMD_MUX_PFX
+ i
);
443 i8042_command(¶m
, I8042_CMD_AUX_ENABLE
);
446 return i8042_enable_aux_port();
450 * i8042_set_mux_mode checks whether the controller has an active
451 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
454 static int i8042_set_mux_mode(unsigned int mode
, unsigned char *mux_version
)
459 * Get rid of bytes in the queue.
465 * Internal loopback test - send three bytes, they should come back from the
466 * mouse interface, the last should be version.
470 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= 0xf0)
472 param
= mode
? 0x56 : 0xf6;
473 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
!= (mode
? 0x56 : 0xf6))
475 param
= mode
? 0xa4 : 0xa5;
476 if (i8042_command(¶m
, I8042_CMD_AUX_LOOP
) || param
== (mode
? 0xa4 : 0xa5))
480 *mux_version
= param
;
486 * i8042_check_mux() checks whether the controller supports the PS/2 Active
487 * Multiplexing specification by Synaptics, Phoenix, Insyde and
491 static int __devinit
i8042_check_mux(void)
493 unsigned char mux_version
;
495 if (i8042_set_mux_mode(1, &mux_version
))
499 * Workaround for interference with USB Legacy emulation
500 * that causes a v10.12 MUX to be found.
502 if (mux_version
== 0xAC)
505 printk(KERN_INFO
"i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
506 (mux_version
>> 4) & 0xf, mux_version
& 0xf);
509 * Disable all muxed ports by disabling AUX.
511 i8042_ctr
|= I8042_CTR_AUXDIS
;
512 i8042_ctr
&= ~I8042_CTR_AUXINT
;
514 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
515 printk(KERN_ERR
"i8042.c: Failed to disable AUX port, can't use MUX.\n");
519 i8042_mux_present
= 1;
525 * The following is used to test AUX IRQ delivery.
527 static struct completion i8042_aux_irq_delivered __devinitdata
;
528 static int i8042_irq_being_tested __devinitdata
;
530 static irqreturn_t __devinit
i8042_aux_test_irq(int irq
, void *dev_id
)
533 unsigned char str
, data
;
536 spin_lock_irqsave(&i8042_lock
, flags
);
537 str
= i8042_read_status();
538 if (str
& I8042_STR_OBF
) {
539 data
= i8042_read_data();
540 if (i8042_irq_being_tested
&&
541 data
== 0xa5 && (str
& I8042_STR_AUXDATA
))
542 complete(&i8042_aux_irq_delivered
);
545 spin_unlock_irqrestore(&i8042_lock
, flags
);
547 return IRQ_RETVAL(ret
);
551 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
552 * verifies success by readinng CTR. Used when testing for presence of AUX
555 static int __devinit
i8042_toggle_aux(int on
)
560 if (i8042_command(¶m
,
561 on
? I8042_CMD_AUX_ENABLE
: I8042_CMD_AUX_DISABLE
))
564 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
565 for (i
= 0; i
< 100; i
++) {
568 if (i8042_command(¶m
, I8042_CMD_CTL_RCTR
))
571 if (!(param
& I8042_CTR_AUXDIS
) == on
)
579 * i8042_check_aux() applies as much paranoia as it can at detecting
580 * the presence of an AUX interface.
583 static int __devinit
i8042_check_aux(void)
586 int irq_registered
= 0;
587 int aux_loop_broken
= 0;
592 * Get rid of bytes in the queue.
598 * Internal loopback test - filters out AT-type i8042's. Unfortunately
599 * SiS screwed up and their 5597 doesn't support the LOOP command even
600 * though it has an AUX port.
604 retval
= i8042_command(¶m
, I8042_CMD_AUX_LOOP
);
605 if (retval
|| param
!= 0x5a) {
608 * External connection test - filters out AT-soldered PS/2 i8042's
609 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
610 * 0xfa - no error on some notebooks which ignore the spec
611 * Because it's common for chipsets to return error on perfectly functioning
612 * AUX ports, we test for this only when the LOOP command failed.
615 if (i8042_command(¶m
, I8042_CMD_AUX_TEST
) ||
616 (param
&& param
!= 0xfa && param
!= 0xff))
620 * If AUX_LOOP completed without error but returned unexpected data
628 * Bit assignment test - filters out PS/2 i8042's in AT mode
631 if (i8042_toggle_aux(0)) {
632 printk(KERN_WARNING
"Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
633 printk(KERN_WARNING
"If AUX port is really absent please use the 'i8042.noaux' option.\n");
636 if (i8042_toggle_aux(1))
640 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
641 * used it for a PCI card or somethig else.
644 if (i8042_noloop
|| aux_loop_broken
) {
646 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
647 * is working and hope we are right.
653 if (request_irq(I8042_AUX_IRQ
, i8042_aux_test_irq
, IRQF_SHARED
,
654 "i8042", i8042_platform_device
))
659 if (i8042_enable_aux_port())
662 spin_lock_irqsave(&i8042_lock
, flags
);
664 init_completion(&i8042_aux_irq_delivered
);
665 i8042_irq_being_tested
= 1;
668 retval
= __i8042_command(¶m
, I8042_CMD_AUX_LOOP
& 0xf0ff);
670 spin_unlock_irqrestore(&i8042_lock
, flags
);
675 if (wait_for_completion_timeout(&i8042_aux_irq_delivered
,
676 msecs_to_jiffies(250)) == 0) {
678 * AUX IRQ was never delivered so we need to flush the controller to
679 * get rid of the byte we put there; otherwise keyboard may not work.
688 * Disable the interface.
691 i8042_ctr
|= I8042_CTR_AUXDIS
;
692 i8042_ctr
&= ~I8042_CTR_AUXINT
;
694 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
))
698 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
703 static int i8042_controller_check(void)
705 if (i8042_flush() == I8042_BUFFER_SIZE
) {
706 printk(KERN_ERR
"i8042.c: No controller found.\n");
713 static int i8042_controller_selftest(void)
722 * We try this 5 times; on some really fragile systems this does not
723 * take the first time...
727 if (i8042_command(¶m
, I8042_CMD_CTL_TEST
)) {
728 printk(KERN_ERR
"i8042.c: i8042 controller self test timeout.\n");
732 if (param
== I8042_RET_CTL_TEST
)
735 printk(KERN_ERR
"i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
736 param
, I8042_RET_CTL_TEST
);
742 * On x86, we don't fail entire i8042 initialization if controller
743 * reset fails in hopes that keyboard port will still be functional
744 * and user will still get a working keyboard. This is especially
745 * important on netbooks. On other arches we trust hardware more.
748 "i8042: giving up on controller selftest, continuing anyway...\n");
756 * i8042_controller init initializes the i8042 controller, and,
757 * most importantly, sets it into non-xlated mode if that's
761 static int i8042_controller_init(void)
766 * Save the CTR for restoral on unload / reboot.
769 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_RCTR
)) {
770 printk(KERN_ERR
"i8042.c: Can't read CTR while initializing i8042.\n");
774 i8042_initial_ctr
= i8042_ctr
;
777 * Disable the keyboard interface and interrupt.
780 i8042_ctr
|= I8042_CTR_KBDDIS
;
781 i8042_ctr
&= ~I8042_CTR_KBDINT
;
787 spin_lock_irqsave(&i8042_lock
, flags
);
788 if (~i8042_read_status() & I8042_STR_KEYLOCK
) {
790 i8042_ctr
|= I8042_CTR_IGNKEYLOCK
;
792 printk(KERN_WARNING
"i8042.c: Warning: Keylock active.\n");
794 spin_unlock_irqrestore(&i8042_lock
, flags
);
797 * If the chip is configured into nontranslated mode by the BIOS, don't
798 * bother enabling translating and be happy.
801 if (~i8042_ctr
& I8042_CTR_XLATE
)
805 * Set nontranslated mode for the kbd interface if requested by an option.
806 * After this the kbd interface becomes a simple serial in/out, like the aux
807 * interface is. We don't do this by default, since it can confuse notebook
812 i8042_ctr
&= ~I8042_CTR_XLATE
;
818 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
819 printk(KERN_ERR
"i8042.c: Can't write CTR while initializing i8042.\n");
828 * Reset the controller and reset CRT to the original value set by BIOS.
831 static void i8042_controller_reset(void)
836 * Disable both KBD and AUX interfaces so they don't get in the way
839 i8042_ctr
|= I8042_CTR_KBDDIS
| I8042_CTR_AUXDIS
;
840 i8042_ctr
&= ~(I8042_CTR_KBDINT
| I8042_CTR_AUXINT
);
843 * Disable MUX mode if present.
846 if (i8042_mux_present
)
847 i8042_set_mux_mode(0, NULL
);
850 * Reset the controller if requested.
853 i8042_controller_selftest();
856 * Restore the original control register setting.
859 if (i8042_command(&i8042_initial_ctr
, I8042_CMD_CTL_WCTR
))
860 printk(KERN_WARNING
"i8042.c: Can't restore CTR.\n");
865 * i8042_panic_blink() will flash the keyboard LEDs and is called when
866 * kernel panics. Flashing LEDs is useful for users running X who may
867 * not see the console and will help distingushing panics from "real"
870 * Note that DELAY has a limit of 10ms so we will not get stuck here
871 * waiting for KBC to free up even if KBD interrupt is off
874 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
876 static long i8042_panic_blink(long count
)
879 static long last_blink
;
883 * We expect frequency to be about 1/2s. KDB uses about 1s.
884 * Make sure they are different.
886 if (!i8042_blink_frequency
)
888 if (count
- last_blink
< i8042_blink_frequency
)
892 while (i8042_read_status() & I8042_STR_IBF
)
894 dbg("%02x -> i8042 (panic blink)", 0xed);
895 i8042_suppress_kbd_ack
= 2;
896 i8042_write_data(0xed); /* set leds */
898 while (i8042_read_status() & I8042_STR_IBF
)
901 dbg("%02x -> i8042 (panic blink)", led
);
902 i8042_write_data(led
);
911 static void i8042_dritek_enable(void)
916 error
= i8042_command(¶m
, 0x1059);
919 "Failed to enable DRITEK extension: %d\n",
926 static bool i8042_suspended
;
929 * Here we try to restore the original BIOS settings. We only want to
930 * do that once, when we really suspend, not when we taking memory
931 * snapshot for swsusp (in this case we'll perform required cleanup
932 * as part of shutdown process).
935 static int i8042_suspend(struct platform_device
*dev
, pm_message_t state
)
937 if (!i8042_suspended
&& state
.event
== PM_EVENT_SUSPEND
)
938 i8042_controller_reset();
940 i8042_suspended
= state
.event
== PM_EVENT_SUSPEND
||
941 state
.event
== PM_EVENT_FREEZE
;
948 * Here we try to reset everything back to a state in which suspended
951 static int i8042_resume(struct platform_device
*dev
)
956 * Do not bother with restoring state if we haven't suspened yet
958 if (!i8042_suspended
)
961 error
= i8042_controller_check();
965 error
= i8042_controller_selftest();
970 * Restore original CTR value and disable all ports
973 i8042_ctr
= i8042_initial_ctr
;
975 i8042_ctr
&= ~I8042_CTR_XLATE
;
976 i8042_ctr
|= I8042_CTR_AUXDIS
| I8042_CTR_KBDDIS
;
977 i8042_ctr
&= ~(I8042_CTR_AUXINT
| I8042_CTR_KBDINT
);
978 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
979 printk(KERN_WARNING
"i8042: Can't write CTR to resume, retrying...\n");
981 if (i8042_command(&i8042_ctr
, I8042_CMD_CTL_WCTR
)) {
982 printk(KERN_ERR
"i8042: CTR write retry failed\n");
990 i8042_dritek_enable();
993 if (i8042_mux_present
) {
994 if (i8042_set_mux_mode(1, NULL
) || i8042_enable_mux_ports())
996 "i8042: failed to resume active multiplexor, "
997 "mouse won't work.\n");
998 } else if (i8042_ports
[I8042_AUX_PORT_NO
].serio
)
999 i8042_enable_aux_port();
1001 if (i8042_ports
[I8042_KBD_PORT_NO
].serio
)
1002 i8042_enable_kbd_port();
1004 i8042_suspended
= false;
1005 i8042_interrupt(0, NULL
);
1009 #endif /* CONFIG_PM */
1012 * We need to reset the 8042 back to original mode on system shutdown,
1013 * because otherwise BIOSes will be confused.
1016 static void i8042_shutdown(struct platform_device
*dev
)
1018 i8042_controller_reset();
1021 static int __devinit
i8042_create_kbd_port(void)
1023 struct serio
*serio
;
1024 struct i8042_port
*port
= &i8042_ports
[I8042_KBD_PORT_NO
];
1026 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
1030 serio
->id
.type
= i8042_direct
? SERIO_8042
: SERIO_8042_XL
;
1031 serio
->write
= i8042_dumbkbd
? NULL
: i8042_kbd_write
;
1032 serio
->start
= i8042_start
;
1033 serio
->stop
= i8042_stop
;
1034 serio
->port_data
= port
;
1035 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1036 strlcpy(serio
->name
, "i8042 KBD port", sizeof(serio
->name
));
1037 strlcpy(serio
->phys
, I8042_KBD_PHYS_DESC
, sizeof(serio
->phys
));
1039 port
->serio
= serio
;
1040 port
->irq
= I8042_KBD_IRQ
;
1045 static int __devinit
i8042_create_aux_port(int idx
)
1047 struct serio
*serio
;
1048 int port_no
= idx
< 0 ? I8042_AUX_PORT_NO
: I8042_MUX_PORT_NO
+ idx
;
1049 struct i8042_port
*port
= &i8042_ports
[port_no
];
1051 serio
= kzalloc(sizeof(struct serio
), GFP_KERNEL
);
1055 serio
->id
.type
= SERIO_8042
;
1056 serio
->write
= i8042_aux_write
;
1057 serio
->start
= i8042_start
;
1058 serio
->stop
= i8042_stop
;
1059 serio
->port_data
= port
;
1060 serio
->dev
.parent
= &i8042_platform_device
->dev
;
1062 strlcpy(serio
->name
, "i8042 AUX port", sizeof(serio
->name
));
1063 strlcpy(serio
->phys
, I8042_AUX_PHYS_DESC
, sizeof(serio
->phys
));
1065 snprintf(serio
->name
, sizeof(serio
->name
), "i8042 AUX%d port", idx
);
1066 snprintf(serio
->phys
, sizeof(serio
->phys
), I8042_MUX_PHYS_DESC
, idx
+ 1);
1069 port
->serio
= serio
;
1071 port
->irq
= I8042_AUX_IRQ
;
1076 static void __devinit
i8042_free_kbd_port(void)
1078 kfree(i8042_ports
[I8042_KBD_PORT_NO
].serio
);
1079 i8042_ports
[I8042_KBD_PORT_NO
].serio
= NULL
;
1082 static void __devinit
i8042_free_aux_ports(void)
1086 for (i
= I8042_AUX_PORT_NO
; i
< I8042_NUM_PORTS
; i
++) {
1087 kfree(i8042_ports
[i
].serio
);
1088 i8042_ports
[i
].serio
= NULL
;
1092 static void __devinit
i8042_register_ports(void)
1096 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1097 if (i8042_ports
[i
].serio
) {
1098 printk(KERN_INFO
"serio: %s at %#lx,%#lx irq %d\n",
1099 i8042_ports
[i
].serio
->name
,
1100 (unsigned long) I8042_DATA_REG
,
1101 (unsigned long) I8042_COMMAND_REG
,
1102 i8042_ports
[i
].irq
);
1103 serio_register_port(i8042_ports
[i
].serio
);
1108 static void __devexit
i8042_unregister_ports(void)
1112 for (i
= 0; i
< I8042_NUM_PORTS
; i
++) {
1113 if (i8042_ports
[i
].serio
) {
1114 serio_unregister_port(i8042_ports
[i
].serio
);
1115 i8042_ports
[i
].serio
= NULL
;
1120 static void i8042_free_irqs(void)
1122 if (i8042_aux_irq_registered
)
1123 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1124 if (i8042_kbd_irq_registered
)
1125 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1127 i8042_aux_irq_registered
= i8042_kbd_irq_registered
= 0;
1130 static int __devinit
i8042_setup_aux(void)
1132 int (*aux_enable
)(void);
1136 if (i8042_check_aux())
1139 if (i8042_nomux
|| i8042_check_mux()) {
1140 error
= i8042_create_aux_port(-1);
1142 goto err_free_ports
;
1143 aux_enable
= i8042_enable_aux_port
;
1145 for (i
= 0; i
< I8042_NUM_MUX_PORTS
; i
++) {
1146 error
= i8042_create_aux_port(i
);
1148 goto err_free_ports
;
1150 aux_enable
= i8042_enable_mux_ports
;
1153 error
= request_irq(I8042_AUX_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1154 "i8042", i8042_platform_device
);
1156 goto err_free_ports
;
1161 i8042_aux_irq_registered
= 1;
1165 free_irq(I8042_AUX_IRQ
, i8042_platform_device
);
1167 i8042_free_aux_ports();
1171 static int __devinit
i8042_setup_kbd(void)
1175 error
= i8042_create_kbd_port();
1179 error
= request_irq(I8042_KBD_IRQ
, i8042_interrupt
, IRQF_SHARED
,
1180 "i8042", i8042_platform_device
);
1184 error
= i8042_enable_kbd_port();
1188 i8042_kbd_irq_registered
= 1;
1192 free_irq(I8042_KBD_IRQ
, i8042_platform_device
);
1194 i8042_free_kbd_port();
1198 static int __devinit
i8042_probe(struct platform_device
*dev
)
1202 error
= i8042_controller_selftest();
1206 error
= i8042_controller_init();
1212 i8042_dritek_enable();
1216 error
= i8042_setup_aux();
1217 if (error
&& error
!= -ENODEV
&& error
!= -EBUSY
)
1222 error
= i8042_setup_kbd();
1227 * Ok, everything is ready, let's register all serio ports
1229 i8042_register_ports();
1234 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1236 i8042_controller_reset();
1241 static int __devexit
i8042_remove(struct platform_device
*dev
)
1243 i8042_unregister_ports();
1245 i8042_controller_reset();
1250 static struct platform_driver i8042_driver
= {
1253 .owner
= THIS_MODULE
,
1255 .probe
= i8042_probe
,
1256 .remove
= __devexit_p(i8042_remove
),
1257 .shutdown
= i8042_shutdown
,
1259 .suspend
= i8042_suspend
,
1260 .resume
= i8042_resume
,
1264 static int __init
i8042_init(void)
1270 err
= i8042_platform_init();
1274 err
= i8042_controller_check();
1276 goto err_platform_exit
;
1278 err
= platform_driver_register(&i8042_driver
);
1280 goto err_platform_exit
;
1282 i8042_platform_device
= platform_device_alloc("i8042", -1);
1283 if (!i8042_platform_device
) {
1285 goto err_unregister_driver
;
1288 err
= platform_device_add(i8042_platform_device
);
1290 goto err_free_device
;
1292 panic_blink
= i8042_panic_blink
;
1297 platform_device_put(i8042_platform_device
);
1298 err_unregister_driver
:
1299 platform_driver_unregister(&i8042_driver
);
1301 i8042_platform_exit();
1306 static void __exit
i8042_exit(void)
1308 platform_device_unregister(i8042_platform_device
);
1309 platform_driver_unregister(&i8042_driver
);
1310 i8042_platform_exit();
1315 module_init(i8042_init
);
1316 module_exit(i8042_exit
);