?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
close_port, kpacket_gen kmalloc oom, formard.c wake_sender/skb receive oom handling...
[cor_2_6_31.git] / drivers / usb / gadget / lh7a40x_udc.c
blob6cd3d54f56409d9255da3620e624f500b75511ed
1 /*
2 * linux/drivers/usb/gadget/lh7a40x_udc.c
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24 #include <linux/platform_device.h>
25
26 #include "lh7a40x_udc.h"
27
28 //#define DEBUG printk
29 //#define DEBUG_EP0 printk
30 //#define DEBUG_SETUP printk
31
32 #ifndef DEBUG_EP0
33 # define DEBUG_EP0(fmt,args...)
34 #endif
35 #ifndef DEBUG_SETUP
36 # define DEBUG_SETUP(fmt,args...)
37 #endif
38 #ifndef DEBUG
39 # define NO_STATES
40 # define DEBUG(fmt,args...)
41 #endif
42
43 #define DRIVER_DESC "LH7A40x USB Device Controller"
44 #define DRIVER_VERSION __DATE__
45
46 #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
47 #define _BIT(x) (1<<(x))
48 #endif
49
50 struct lh7a40x_udc *the_controller;
51
52 static const char driver_name[] = "lh7a40x_udc";
53 static const char driver_desc[] = DRIVER_DESC;
54 static const char ep0name[] = "ep0-control";
55
56 /*
57 Local definintions.
58 */
59
60 #ifndef NO_STATES
61 static char *state_names[] = {
62 "WAIT_FOR_SETUP",
63 "DATA_STATE_XMIT",
64 "DATA_STATE_NEED_ZLP",
65 "WAIT_FOR_OUT_STATUS",
66 "DATA_STATE_RECV"
67 };
68 #endif
69
70 /*
71 Local declarations.
72 */
73 static int lh7a40x_ep_enable(struct usb_ep *ep,
74 const struct usb_endpoint_descriptor *);
75 static int lh7a40x_ep_disable(struct usb_ep *ep);
76 static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
77 static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
78 static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
79 static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
80 static int lh7a40x_set_halt(struct usb_ep *ep, int);
81 static int lh7a40x_fifo_status(struct usb_ep *ep);
82 static void lh7a40x_fifo_flush(struct usb_ep *ep);
83 static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
84 static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
85
86 static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
87 int status);
88 static void pio_irq_enable(int bEndpointAddress);
89 static void pio_irq_disable(int bEndpointAddress);
90 static void stop_activity(struct lh7a40x_udc *dev,
91 struct usb_gadget_driver *driver);
92 static void flush(struct lh7a40x_ep *ep);
93 static void udc_enable(struct lh7a40x_udc *dev);
94 static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
95
96 static struct usb_ep_ops lh7a40x_ep_ops = {
97 .enable = lh7a40x_ep_enable,
98 .disable = lh7a40x_ep_disable,
99
100 .alloc_request = lh7a40x_alloc_request,
101 .free_request = lh7a40x_free_request,
102
103 .queue = lh7a40x_queue,
104 .dequeue = lh7a40x_dequeue,
105
106 .set_halt = lh7a40x_set_halt,
107 .fifo_status = lh7a40x_fifo_status,
108 .fifo_flush = lh7a40x_fifo_flush,
109 };
110
111 /* Inline code */
112
113 static __inline__ int write_packet(struct lh7a40x_ep *ep,
114 struct lh7a40x_request *req, int max)
115 {
116 u8 *buf;
117 int length, count;
118 volatile u32 *fifo = (volatile u32 *)ep->fifo;
119
120 buf = req->req.buf + req->req.actual;
121 prefetch(buf);
122
123 length = req->req.length - req->req.actual;
124 length = min(length, max);
125 req->req.actual += length;
126
127 DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
128
129 count = length;
130 while (count--) {
131 *fifo = *buf++;
132 }
133
134 return length;
135 }
136
137 static __inline__ void usb_set_index(u32 ep)
138 {
139 *(volatile u32 *)io_p2v(USB_INDEX) = ep;
140 }
141
142 static __inline__ u32 usb_read(u32 port)
143 {
144 return *(volatile u32 *)io_p2v(port);
145 }
146
147 static __inline__ void usb_write(u32 val, u32 port)
148 {
149 *(volatile u32 *)io_p2v(port) = val;
150 }
151
152 static __inline__ void usb_set(u32 val, u32 port)
153 {
154 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
155 u32 after = (*ioport) | val;
156 *ioport = after;
157 }
158
159 static __inline__ void usb_clear(u32 val, u32 port)
160 {
161 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
162 u32 after = (*ioport) & ~val;
163 *ioport = after;
164 }
165
166 /*-------------------------------------------------------------------------*/
167
168 #define GPIO_PORTC_DR (0x80000E08)
169 #define GPIO_PORTC_DDR (0x80000E18)
170 #define GPIO_PORTC_PDR (0x80000E70)
171
172 /* get port C pin data register */
173 #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
174 /* get port C data direction register */
175 #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
176 /* set port C data register */
177 #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
178 /* set port C data direction register */
179 #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
180
181 /*
182 * LPD7A404 GPIO's:
183 * Port C bit 1 = USB Port 1 Power Enable
184 * Port C bit 2 = USB Port 1 Data Carrier Detect
185 */
186 #define is_usb_connected() get_portc_pdr(2)
187
188 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
189
190 static const char proc_node_name[] = "driver/udc";
191
192 static int
193 udc_proc_read(char *page, char **start, off_t off, int count,
194 int *eof, void *_dev)
195 {
196 char *buf = page;
197 struct lh7a40x_udc *dev = _dev;
198 char *next = buf;
199 unsigned size = count;
200 unsigned long flags;
201 int t;
202
203 if (off != 0)
204 return 0;
205
206 local_irq_save(flags);
207
208 /* basic device status */
209 t = scnprintf(next, size,
210 DRIVER_DESC "\n"
211 "%s version: %s\n"
212 "Gadget driver: %s\n"
213 "Host: %s\n\n",
214 driver_name, DRIVER_VERSION,
215 dev->driver ? dev->driver->driver.name : "(none)",
216 is_usb_connected()? "full speed" : "disconnected");
217 size -= t;
218 next += t;
219
220 t = scnprintf(next, size,
221 "GPIO:\n"
222 " Port C bit 1: %d, dir %d\n"
223 " Port C bit 2: %d, dir %d\n\n",
224 get_portc_pdr(1), get_portc_ddr(1),
225 get_portc_pdr(2), get_portc_ddr(2)
226 );
227 size -= t;
228 next += t;
229
230 t = scnprintf(next, size,
231 "DCP pullup: %d\n\n",
232 (usb_read(USB_PM) & PM_USB_DCP) != 0);
233 size -= t;
234 next += t;
235
236 local_irq_restore(flags);
237 *eof = 1;
238 return count - size;
239 }
240
241 #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
242 #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
243
244 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
245
246 #define create_proc_files() do {} while (0)
247 #define remove_proc_files() do {} while (0)
248
249 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
250
251 /*
252 * udc_disable - disable USB device controller
253 */
254 static void udc_disable(struct lh7a40x_udc *dev)
255 {
256 DEBUG("%s, %p\n", __func__, dev);
257
258 udc_set_address(dev, 0);
259
260 /* Disable interrupts */
261 usb_write(0, USB_IN_INT_EN);
262 usb_write(0, USB_OUT_INT_EN);
263 usb_write(0, USB_INT_EN);
264
265 /* Disable the USB */
266 usb_write(0, USB_PM);
267
268 #ifdef CONFIG_ARCH_LH7A404
269 /* Disable USB power */
270 set_portc_dr(1, 0);
271 #endif
272
273 /* if hardware supports it, disconnect from usb */
274 /* make_usb_disappear(); */
275
276 dev->ep0state = WAIT_FOR_SETUP;
277 dev->gadget.speed = USB_SPEED_UNKNOWN;
278 dev->usb_address = 0;
279 }
280
281 /*
282 * udc_reinit - initialize software state
283 */
284 static void udc_reinit(struct lh7a40x_udc *dev)
285 {
286 u32 i;
287
288 DEBUG("%s, %p\n", __func__, dev);
289
290 /* device/ep0 records init */
291 INIT_LIST_HEAD(&dev->gadget.ep_list);
292 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
293 dev->ep0state = WAIT_FOR_SETUP;
294
295 /* basic endpoint records init */
296 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
297 struct lh7a40x_ep *ep = &dev->ep[i];
298
299 if (i != 0)
300 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
301
302 ep->desc = 0;
303 ep->stopped = 0;
304 INIT_LIST_HEAD(&ep->queue);
305 ep->pio_irqs = 0;
306 }
307
308 /* the rest was statically initialized, and is read-only */
309 }
310
311 #define BYTES2MAXP(x) (x / 8)
312 #define MAXP2BYTES(x) (x * 8)
313
314 /* until it's enabled, this UDC should be completely invisible
315 * to any USB host.
316 */
317 static void udc_enable(struct lh7a40x_udc *dev)
318 {
319 int ep;
320
321 DEBUG("%s, %p\n", __func__, dev);
322
323 dev->gadget.speed = USB_SPEED_UNKNOWN;
324
325 #ifdef CONFIG_ARCH_LH7A404
326 /* Set Port C bit 1 & 2 as output */
327 set_portc_ddr(1, 1);
328 set_portc_ddr(2, 1);
329
330 /* Enable USB power */
331 set_portc_dr(1, 0);
332 #endif
333
334 /*
335 * C.f Chapter 18.1.3.1 Initializing the USB
336 */
337
338 /* Disable the USB */
339 usb_clear(PM_USB_ENABLE, USB_PM);
340
341 /* Reset APB & I/O sides of the USB */
342 usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
343 mdelay(5);
344 usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
345
346 /* Set MAXP values for each */
347 for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
348 struct lh7a40x_ep *ep_reg = &dev->ep[ep];
349 u32 csr;
350
351 usb_set_index(ep);
352
353 switch (ep_reg->ep_type) {
354 case ep_bulk_in:
355 case ep_interrupt:
356 usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
357 ep_reg->csr2);
358 /* Fall through */
359 case ep_control:
360 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
361 USB_IN_MAXP);
362 break;
363 case ep_bulk_out:
364 usb_clear(USB_OUT_CSR2_USB_DMA_EN |
365 USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
366 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
367 USB_OUT_MAXP);
368 break;
369 }
370
371 /* Read & Write CSR1, just in case */
372 csr = usb_read(ep_reg->csr1);
373 usb_write(csr, ep_reg->csr1);
374
375 flush(ep_reg);
376 }
377
378 /* Disable interrupts */
379 usb_write(0, USB_IN_INT_EN);
380 usb_write(0, USB_OUT_INT_EN);
381 usb_write(0, USB_INT_EN);
382
383 /* Enable interrupts */
384 usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
385 usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
386 /* Dont enable rest of the interrupts */
387 /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
388 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
389
390 /* Enable SUSPEND */
391 usb_set(PM_ENABLE_SUSPEND, USB_PM);
392
393 /* Enable the USB */
394 usb_set(PM_USB_ENABLE, USB_PM);
395
396 #ifdef CONFIG_ARCH_LH7A404
397 /* NOTE: DOES NOT WORK! */
398 /* Let host detect UDC:
399 * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
400 * transistor on and pull the USBDP pin HIGH.
401 */
402 /* usb_clear(PM_USB_DCP, USB_PM);
403 usb_set(PM_USB_DCP, USB_PM); */
404 #endif
405 }
406
407 /*
408 Register entry point for the peripheral controller driver.
409 */
410 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
411 {
412 struct lh7a40x_udc *dev = the_controller;
413 int retval;
414
415 DEBUG("%s: %s\n", __func__, driver->driver.name);
416
417 if (!driver
418 || driver->speed != USB_SPEED_FULL
419 || !driver->bind
420 || !driver->disconnect
421 || !driver->setup)
422 return -EINVAL;
423 if (!dev)
424 return -ENODEV;
425 if (dev->driver)
426 return -EBUSY;
427
428 /* first hook up the driver ... */
429 dev->driver = driver;
430 dev->gadget.dev.driver = &driver->driver;
431
432 device_add(&dev->gadget.dev);
433 retval = driver->bind(&dev->gadget);
434 if (retval) {
435 printk(KERN_WARNING "%s: bind to driver %s --> error %d\n",
436 dev->gadget.name, driver->driver.name, retval);
437 device_del(&dev->gadget.dev);
438
439 dev->driver = 0;
440 dev->gadget.dev.driver = 0;
441 return retval;
442 }
443
444 /* ... then enable host detection and ep0; and we're ready
445 * for set_configuration as well as eventual disconnect.
446 * NOTE: this shouldn't power up until later.
447 */
448 printk(KERN_WARNING "%s: registered gadget driver '%s'\n",
449 dev->gadget.name, driver->driver.name);
450
451 udc_enable(dev);
452
453 return 0;
454 }
455
456 EXPORT_SYMBOL(usb_gadget_register_driver);
457
458 /*
459 Unregister entry point for the peripheral controller driver.
460 */
461 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
462 {
463 struct lh7a40x_udc *dev = the_controller;
464 unsigned long flags;
465
466 if (!dev)
467 return -ENODEV;
468 if (!driver || driver != dev->driver || !driver->unbind)
469 return -EINVAL;
470
471 spin_lock_irqsave(&dev->lock, flags);
472 dev->driver = 0;
473 stop_activity(dev, driver);
474 spin_unlock_irqrestore(&dev->lock, flags);
475
476 driver->unbind(&dev->gadget);
477 dev->gadget.dev.driver = NULL;
478 device_del(&dev->gadget.dev);
479
480 udc_disable(dev);
481
482 DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
483 return 0;
484 }
485
486 EXPORT_SYMBOL(usb_gadget_unregister_driver);
487
488 /*-------------------------------------------------------------------------*/
489
490 /** Write request to FIFO (max write == maxp size)
491 * Return: 0 = still running, 1 = completed, negative = errno
492 * NOTE: INDEX register must be set for EP
493 */
494 static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
495 {
496 u32 max;
497 u32 csr;
498
499 max = le16_to_cpu(ep->desc->wMaxPacketSize);
500
501 csr = usb_read(ep->csr1);
502 DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
503
504 if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
505 unsigned count;
506 int is_last, is_short;
507
508 count = write_packet(ep, req, max);
509 usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
510
511 /* last packet is usually short (or a zlp) */
512 if (unlikely(count != max))
513 is_last = is_short = 1;
514 else {
515 if (likely(req->req.length != req->req.actual)
516 || req->req.zero)
517 is_last = 0;
518 else
519 is_last = 1;
520 /* interrupt/iso maxpacket may not fill the fifo */
521 is_short = unlikely(max < ep_maxpacket(ep));
522 }
523
524 DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__,
525 ep->ep.name, count,
526 is_last ? "/L" : "", is_short ? "/S" : "",
527 req->req.length - req->req.actual, req);
528
529 /* requests complete when all IN data is in the FIFO */
530 if (is_last) {
531 done(ep, req, 0);
532 if (list_empty(&ep->queue)) {
533 pio_irq_disable(ep_index(ep));
534 }
535 return 1;
536 }
537 } else {
538 DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
539 }
540
541 return 0;
542 }
543
544 /** Read to request from FIFO (max read == bytes in fifo)
545 * Return: 0 = still running, 1 = completed, negative = errno
546 * NOTE: INDEX register must be set for EP
547 */
548 static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
549 {
550 u32 csr;
551 u8 *buf;
552 unsigned bufferspace, count, is_short;
553 volatile u32 *fifo = (volatile u32 *)ep->fifo;
554
555 /* make sure there's a packet in the FIFO. */
556 csr = usb_read(ep->csr1);
557 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
558 DEBUG("%s: Packet NOT ready!\n", __func__);
559 return -EINVAL;
560 }
561
562 buf = req->req.buf + req->req.actual;
563 prefetchw(buf);
564 bufferspace = req->req.length - req->req.actual;
565
566 /* read all bytes from this packet */
567 count = usb_read(USB_OUT_FIFO_WC1);
568 req->req.actual += min(count, bufferspace);
569
570 is_short = (count < ep->ep.maxpacket);
571 DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
572 ep->ep.name, csr, count,
573 is_short ? "/S" : "", req, req->req.actual, req->req.length);
574
575 while (likely(count-- != 0)) {
576 u8 byte = (u8) (*fifo & 0xff);
577
578 if (unlikely(bufferspace == 0)) {
579 /* this happens when the driver's buffer
580 * is smaller than what the host sent.
581 * discard the extra data.
582 */
583 if (req->req.status != -EOVERFLOW)
584 printk(KERN_WARNING "%s overflow %d\n",
585 ep->ep.name, count);
586 req->req.status = -EOVERFLOW;
587 } else {
588 *buf++ = byte;
589 bufferspace--;
590 }
591 }
592
593 usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
594
595 /* completion */
596 if (is_short || req->req.actual == req->req.length) {
597 done(ep, req, 0);
598 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
599
600 if (list_empty(&ep->queue))
601 pio_irq_disable(ep_index(ep));
602 return 1;
603 }
604
605 /* finished that packet. the next one may be waiting... */
606 return 0;
607 }
608
609 /*
610 * done - retire a request; caller blocked irqs
611 * INDEX register is preserved to keep same
612 */
613 static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
614 {
615 unsigned int stopped = ep->stopped;
616 u32 index;
617
618 DEBUG("%s, %p\n", __func__, ep);
619 list_del_init(&req->queue);
620
621 if (likely(req->req.status == -EINPROGRESS))
622 req->req.status = status;
623 else
624 status = req->req.status;
625
626 if (status && status != -ESHUTDOWN)
627 DEBUG("complete %s req %p stat %d len %u/%u\n",
628 ep->ep.name, &req->req, status,
629 req->req.actual, req->req.length);
630
631 /* don't modify queue heads during completion callback */
632 ep->stopped = 1;
633 /* Read current index (completion may modify it) */
634 index = usb_read(USB_INDEX);
635
636 spin_unlock(&ep->dev->lock);
637 req->req.complete(&ep->ep, &req->req);
638 spin_lock(&ep->dev->lock);
639
640 /* Restore index */
641 usb_set_index(index);
642 ep->stopped = stopped;
643 }
644
645 /** Enable EP interrupt */
646 static void pio_irq_enable(int ep)
647 {
648 DEBUG("%s: %d\n", __func__, ep);
649
650 switch (ep) {
651 case 1:
652 usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
653 break;
654 case 2:
655 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
656 break;
657 case 3:
658 usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
659 break;
660 default:
661 DEBUG("Unknown endpoint: %d\n", ep);
662 break;
663 }
664 }
665
666 /** Disable EP interrupt */
667 static void pio_irq_disable(int ep)
668 {
669 DEBUG("%s: %d\n", __func__, ep);
670
671 switch (ep) {
672 case 1:
673 usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
674 break;
675 case 2:
676 usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
677 break;
678 case 3:
679 usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
680 break;
681 default:
682 DEBUG("Unknown endpoint: %d\n", ep);
683 break;
684 }
685 }
686
687 /*
688 * nuke - dequeue ALL requests
689 */
690 void nuke(struct lh7a40x_ep *ep, int status)
691 {
692 struct lh7a40x_request *req;
693
694 DEBUG("%s, %p\n", __func__, ep);
695
696 /* Flush FIFO */
697 flush(ep);
698
699 /* called with irqs blocked */
700 while (!list_empty(&ep->queue)) {
701 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
702 done(ep, req, status);
703 }
704
705 /* Disable IRQ if EP is enabled (has descriptor) */
706 if (ep->desc)
707 pio_irq_disable(ep_index(ep));
708 }
709
710 /*
711 void nuke_all(struct lh7a40x_udc *dev)
712 {
713 int n;
714 for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
715 struct lh7a40x_ep *ep = &dev->ep[n];
716 usb_set_index(n);
717 nuke(ep, 0);
718 }
719 }*/
720
721 /*
722 static void flush_all(struct lh7a40x_udc *dev)
723 {
724 int n;
725 for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
726 {
727 struct lh7a40x_ep *ep = &dev->ep[n];
728 flush(ep);
729 }
730 }
731 */
732
733 /** Flush EP
734 * NOTE: INDEX register must be set before this call
735 */
736 static void flush(struct lh7a40x_ep *ep)
737 {
738 DEBUG("%s, %p\n", __func__, ep);
739
740 switch (ep->ep_type) {
741 case ep_control:
742 /* check, by implication c.f. 15.1.2.11 */
743 break;
744
745 case ep_bulk_in:
746 case ep_interrupt:
747 /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
748 usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
749 break;
750
751 case ep_bulk_out:
752 /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
753 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
754 break;
755 }
756 }
757
758 /**
759 * lh7a40x_in_epn - handle IN interrupt
760 */
761 static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
762 {
763 u32 csr;
764 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
765 struct lh7a40x_request *req;
766
767 usb_set_index(ep_idx);
768
769 csr = usb_read(ep->csr1);
770 DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr);
771
772 if (csr & USB_IN_CSR1_SENT_STALL) {
773 DEBUG("USB_IN_CSR1_SENT_STALL\n");
774 usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
775 ep->csr1);
776 return;
777 }
778
779 if (!ep->desc) {
780 DEBUG("%s: NO EP DESC\n", __func__);
781 return;
782 }
783
784 if (list_empty(&ep->queue))
785 req = 0;
786 else
787 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
788
789 DEBUG("req: %p\n", req);
790
791 if (!req)
792 return;
793
794 write_fifo(ep, req);
795 }
796
797 /* ********************************************************************************************* */
798 /* Bulk OUT (recv)
799 */
800
801 static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
802 {
803 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
804 struct lh7a40x_request *req;
805
806 DEBUG("%s: %d\n", __func__, ep_idx);
807
808 usb_set_index(ep_idx);
809
810 if (ep->desc) {
811 u32 csr;
812 csr = usb_read(ep->csr1);
813
814 while ((csr =
815 usb_read(ep->
816 csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
817 USB_OUT_CSR1_SENT_STALL)) {
818 DEBUG("%s: %x\n", __func__, csr);
819
820 if (csr & USB_OUT_CSR1_SENT_STALL) {
821 DEBUG("%s: stall sent, flush fifo\n",
822 __func__);
823 /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
824 flush(ep);
825 } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
826 if (list_empty(&ep->queue))
827 req = 0;
828 else
829 req =
830 list_entry(ep->queue.next,
831 struct lh7a40x_request,
832 queue);
833
834 if (!req) {
835 printk(KERN_WARNING
836 "%s: NULL REQ %d\n",
837 __func__, ep_idx);
838 flush(ep);
839 break;
840 } else {
841 read_fifo(ep, req);
842 }
843 }
844
845 }
846
847 } else {
848 /* Throw packet away.. */
849 printk(KERN_WARNING "%s: No descriptor?!?\n", __func__);
850 flush(ep);
851 }
852 }
853
854 static void stop_activity(struct lh7a40x_udc *dev,
855 struct usb_gadget_driver *driver)
856 {
857 int i;
858
859 /* don't disconnect drivers more than once */
860 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
861 driver = 0;
862 dev->gadget.speed = USB_SPEED_UNKNOWN;
863
864 /* prevent new request submissions, kill any outstanding requests */
865 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
866 struct lh7a40x_ep *ep = &dev->ep[i];
867 ep->stopped = 1;
868
869 usb_set_index(i);
870 nuke(ep, -ESHUTDOWN);
871 }
872
873 /* report disconnect; the driver is already quiesced */
874 if (driver) {
875 spin_unlock(&dev->lock);
876 driver->disconnect(&dev->gadget);
877 spin_lock(&dev->lock);
878 }
879
880 /* re-init driver-visible data structures */
881 udc_reinit(dev);
882 }
883
884 /** Handle USB RESET interrupt
885 */
886 static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
887 {
888 #if 0 /* def CONFIG_ARCH_LH7A404 */
889 /* Does not work always... */
890
891 DEBUG("%s: %d\n", __func__, dev->usb_address);
892
893 if (!dev->usb_address) {
894 /*usb_set(USB_RESET_IO, USB_RESET);
895 mdelay(5);
896 usb_clear(USB_RESET_IO, USB_RESET); */
897 return;
898 }
899 /* Put the USB controller into reset. */
900 usb_set(USB_RESET_IO, USB_RESET);
901
902 /* Set Device ID to 0 */
903 udc_set_address(dev, 0);
904
905 /* Let PLL2 settle down */
906 mdelay(5);
907
908 /* Release the USB controller from reset */
909 usb_clear(USB_RESET_IO, USB_RESET);
910
911 /* Re-enable UDC */
912 udc_enable(dev);
913
914 #endif
915 dev->gadget.speed = USB_SPEED_FULL;
916 }
917
918 /*
919 * lh7a40x usb client interrupt handler.
920 */
921 static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
922 {
923 struct lh7a40x_udc *dev = _dev;
924
925 DEBUG("\n\n");
926
927 spin_lock(&dev->lock);
928
929 for (;;) {
930 u32 intr_in = usb_read(USB_IN_INT);
931 u32 intr_out = usb_read(USB_OUT_INT);
932 u32 intr_int = usb_read(USB_INT);
933
934 /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
935 u32 in_en = usb_read(USB_IN_INT_EN);
936 u32 out_en = usb_read(USB_OUT_INT_EN);
937
938 if (!intr_out && !intr_in && !intr_int)
939 break;
940
941 DEBUG("%s (on state %s)\n", __func__,
942 state_names[dev->ep0state]);
943 DEBUG("intr_out = %x\n", intr_out);
944 DEBUG("intr_in = %x\n", intr_in);
945 DEBUG("intr_int = %x\n", intr_int);
946
947 if (intr_in) {
948 usb_write(intr_in, USB_IN_INT);
949
950 if ((intr_in & USB_IN_INT_EP1)
951 && (in_en & USB_IN_INT_EP1)) {
952 DEBUG("USB_IN_INT_EP1\n");
953 lh7a40x_in_epn(dev, 1, intr_in);
954 }
955 if ((intr_in & USB_IN_INT_EP3)
956 && (in_en & USB_IN_INT_EP3)) {
957 DEBUG("USB_IN_INT_EP3\n");
958 lh7a40x_in_epn(dev, 3, intr_in);
959 }
960 if (intr_in & USB_IN_INT_EP0) {
961 DEBUG("USB_IN_INT_EP0 (control)\n");
962 lh7a40x_handle_ep0(dev, intr_in);
963 }
964 }
965
966 if (intr_out) {
967 usb_write(intr_out, USB_OUT_INT);
968
969 if ((intr_out & USB_OUT_INT_EP2)
970 && (out_en & USB_OUT_INT_EP2)) {
971 DEBUG("USB_OUT_INT_EP2\n");
972 lh7a40x_out_epn(dev, 2, intr_out);
973 }
974 }
975
976 if (intr_int) {
977 usb_write(intr_int, USB_INT);
978
979 if (intr_int & USB_INT_RESET_INT) {
980 lh7a40x_reset_intr(dev);
981 }
982
983 if (intr_int & USB_INT_RESUME_INT) {
984 DEBUG("USB resume\n");
985
986 if (dev->gadget.speed != USB_SPEED_UNKNOWN
987 && dev->driver
988 && dev->driver->resume
989 && is_usb_connected()) {
990 dev->driver->resume(&dev->gadget);
991 }
992 }
993
994 if (intr_int & USB_INT_SUSPEND_INT) {
995 DEBUG("USB suspend%s\n",
996 is_usb_connected()? "" : "+disconnect");
997 if (!is_usb_connected()) {
998 stop_activity(dev, dev->driver);
999 } else if (dev->gadget.speed !=
1000 USB_SPEED_UNKNOWN && dev->driver
1001 && dev->driver->suspend) {
1002 dev->driver->suspend(&dev->gadget);
1003 }
1004 }
1005
1006 }
1007 }
1008
1009 spin_unlock(&dev->lock);
1010
1011 return IRQ_HANDLED;
1012 }
1013
1014 static int lh7a40x_ep_enable(struct usb_ep *_ep,
1015 const struct usb_endpoint_descriptor *desc)
1016 {
1017 struct lh7a40x_ep *ep;
1018 struct lh7a40x_udc *dev;
1019 unsigned long flags;
1020
1021 DEBUG("%s, %p\n", __func__, _ep);
1022
1023 ep = container_of(_ep, struct lh7a40x_ep, ep);
1024 if (!_ep || !desc || ep->desc || _ep->name == ep0name
1025 || desc->bDescriptorType != USB_DT_ENDPOINT
1026 || ep->bEndpointAddress != desc->bEndpointAddress
1027 || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
1028 DEBUG("%s, bad ep or descriptor\n", __func__);
1029 return -EINVAL;
1030 }
1031
1032 /* xfer types must match, except that interrupt ~= bulk */
1033 if (ep->bmAttributes != desc->bmAttributes
1034 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
1035 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
1036 DEBUG("%s, %s type mismatch\n", __func__, _ep->name);
1037 return -EINVAL;
1038 }
1039
1040 /* hardware _could_ do smaller, but driver doesn't */
1041 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
1042 && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
1043 || !desc->wMaxPacketSize) {
1044 DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name);
1045 return -ERANGE;
1046 }
1047
1048 dev = ep->dev;
1049 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1050 DEBUG("%s, bogus device state\n", __func__);
1051 return -ESHUTDOWN;
1052 }
1053
1054 spin_lock_irqsave(&ep->dev->lock, flags);
1055
1056 ep->stopped = 0;
1057 ep->desc = desc;
1058 ep->pio_irqs = 0;
1059 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
1060
1061 spin_unlock_irqrestore(&ep->dev->lock, flags);
1062
1063 /* Reset halt state (does flush) */
1064 lh7a40x_set_halt(_ep, 0);
1065
1066 DEBUG("%s: enabled %s\n", __func__, _ep->name);
1067 return 0;
1068 }
1069
1070 /** Disable EP
1071 * NOTE: Sets INDEX register
1072 */
1073 static int lh7a40x_ep_disable(struct usb_ep *_ep)
1074 {
1075 struct lh7a40x_ep *ep;
1076 unsigned long flags;
1077
1078 DEBUG("%s, %p\n", __func__, _ep);
1079
1080 ep = container_of(_ep, struct lh7a40x_ep, ep);
1081 if (!_ep || !ep->desc) {
1082 DEBUG("%s, %s not enabled\n", __func__,
1083 _ep ? ep->ep.name : NULL);
1084 return -EINVAL;
1085 }
1086
1087 spin_lock_irqsave(&ep->dev->lock, flags);
1088
1089 usb_set_index(ep_index(ep));
1090
1091 /* Nuke all pending requests (does flush) */
1092 nuke(ep, -ESHUTDOWN);
1093
1094 /* Disable ep IRQ */
1095 pio_irq_disable(ep_index(ep));
1096
1097 ep->desc = 0;
1098 ep->stopped = 1;
1099
1100 spin_unlock_irqrestore(&ep->dev->lock, flags);
1101
1102 DEBUG("%s: disabled %s\n", __func__, _ep->name);
1103 return 0;
1104 }
1105
1106 static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
1107 gfp_t gfp_flags)
1108 {
1109 struct lh7a40x_request *req;
1110
1111 DEBUG("%s, %p\n", __func__, ep);
1112
1113 req = kzalloc(sizeof(*req), gfp_flags);
1114 if (!req)
1115 return 0;
1116
1117 INIT_LIST_HEAD(&req->queue);
1118
1119 return &req->req;
1120 }
1121
1122 static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
1123 {
1124 struct lh7a40x_request *req;
1125
1126 DEBUG("%s, %p\n", __func__, ep);
1127
1128 req = container_of(_req, struct lh7a40x_request, req);
1129 WARN_ON(!list_empty(&req->queue));
1130 kfree(req);
1131 }
1132
1133 /** Queue one request
1134 * Kickstart transfer if needed
1135 * NOTE: Sets INDEX register
1136 */
1137 static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
1138 gfp_t gfp_flags)
1139 {
1140 struct lh7a40x_request *req;
1141 struct lh7a40x_ep *ep;
1142 struct lh7a40x_udc *dev;
1143 unsigned long flags;
1144
1145 DEBUG("\n\n\n%s, %p\n", __func__, _ep);
1146
1147 req = container_of(_req, struct lh7a40x_request, req);
1148 if (unlikely
1149 (!_req || !_req->complete || !_req->buf
1150 || !list_empty(&req->queue))) {
1151 DEBUG("%s, bad params\n", __func__);
1152 return -EINVAL;
1153 }
1154
1155 ep = container_of(_ep, struct lh7a40x_ep, ep);
1156 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1157 DEBUG("%s, bad ep\n", __func__);
1158 return -EINVAL;
1159 }
1160
1161 dev = ep->dev;
1162 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1163 DEBUG("%s, bogus device state %p\n", __func__, dev->driver);
1164 return -ESHUTDOWN;
1165 }
1166
1167 DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
1168 _req->buf);
1169
1170 spin_lock_irqsave(&dev->lock, flags);
1171
1172 _req->status = -EINPROGRESS;
1173 _req->actual = 0;
1174
1175 /* kickstart this i/o queue? */
1176 DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
1177 ep->stopped);
1178 if (list_empty(&ep->queue) && likely(!ep->stopped)) {
1179 u32 csr;
1180
1181 if (unlikely(ep_index(ep) == 0)) {
1182 /* EP0 */
1183 list_add_tail(&req->queue, &ep->queue);
1184 lh7a40x_ep0_kick(dev, ep);
1185 req = 0;
1186 } else if (ep_is_in(ep)) {
1187 /* EP1 & EP3 */
1188 usb_set_index(ep_index(ep));
1189 csr = usb_read(ep->csr1);
1190 pio_irq_enable(ep_index(ep));
1191 if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
1192 if (write_fifo(ep, req) == 1)
1193 req = 0;
1194 }
1195 } else {
1196 /* EP2 */
1197 usb_set_index(ep_index(ep));
1198 csr = usb_read(ep->csr1);
1199 pio_irq_enable(ep_index(ep));
1200 if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
1201 if (read_fifo(ep, req) == 1)
1202 req = 0;
1203 }
1204 }
1205 }
1206
1207 /* pio or dma irq handler advances the queue. */
1208 if (likely(req != 0))
1209 list_add_tail(&req->queue, &ep->queue);
1210
1211 spin_unlock_irqrestore(&dev->lock, flags);
1212
1213 return 0;
1214 }
1215
1216 /* dequeue JUST ONE request */
1217 static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1218 {
1219 struct lh7a40x_ep *ep;
1220 struct lh7a40x_request *req;
1221 unsigned long flags;
1222
1223 DEBUG("%s, %p\n", __func__, _ep);
1224
1225 ep = container_of(_ep, struct lh7a40x_ep, ep);
1226 if (!_ep || ep->ep.name == ep0name)
1227 return -EINVAL;
1228
1229 spin_lock_irqsave(&ep->dev->lock, flags);
1230
1231 /* make sure it's actually queued on this endpoint */
1232 list_for_each_entry(req, &ep->queue, queue) {
1233 if (&req->req == _req)
1234 break;
1235 }
1236 if (&req->req != _req) {
1237 spin_unlock_irqrestore(&ep->dev->lock, flags);
1238 return -EINVAL;
1239 }
1240
1241 done(ep, req, -ECONNRESET);
1242
1243 spin_unlock_irqrestore(&ep->dev->lock, flags);
1244 return 0;
1245 }
1246
1247 /** Halt specific EP
1248 * Return 0 if success
1249 * NOTE: Sets INDEX register to EP !
1250 */
1251 static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
1252 {
1253 struct lh7a40x_ep *ep;
1254 unsigned long flags;
1255
1256 ep = container_of(_ep, struct lh7a40x_ep, ep);
1257 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1258 DEBUG("%s, bad ep\n", __func__);
1259 return -EINVAL;
1260 }
1261
1262 usb_set_index(ep_index(ep));
1263
1264 DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value);
1265
1266 spin_lock_irqsave(&ep->dev->lock, flags);
1267
1268 if (ep_index(ep) == 0) {
1269 /* EP0 */
1270 usb_set(EP0_SEND_STALL, ep->csr1);
1271 } else if (ep_is_in(ep)) {
1272 u32 csr = usb_read(ep->csr1);
1273 if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
1274 || !list_empty(&ep->queue))) {
1275 /*
1276 * Attempts to halt IN endpoints will fail (returning -EAGAIN)
1277 * if any transfer requests are still queued, or if the controller
1278 * FIFO still holds bytes that the host hasn't collected.
1279 */
1280 spin_unlock_irqrestore(&ep->dev->lock, flags);
1281 DEBUG
1282 ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
1283 (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
1284 !list_empty(&ep->queue));
1285 return -EAGAIN;
1286 }
1287 flush(ep);
1288 if (value)
1289 usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
1290 else {
1291 usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
1292 usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
1293 }
1294
1295 } else {
1296
1297 flush(ep);
1298 if (value)
1299 usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1300 else {
1301 usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1302 usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
1303 }
1304 }
1305
1306 if (value) {
1307 ep->stopped = 1;
1308 } else {
1309 ep->stopped = 0;
1310 }
1311
1312 spin_unlock_irqrestore(&ep->dev->lock, flags);
1313
1314 DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
1315
1316 return 0;
1317 }
1318
1319 /** Return bytes in EP FIFO
1320 * NOTE: Sets INDEX register to EP
1321 */
1322 static int lh7a40x_fifo_status(struct usb_ep *_ep)
1323 {
1324 u32 csr;
1325 int count = 0;
1326 struct lh7a40x_ep *ep;
1327
1328 ep = container_of(_ep, struct lh7a40x_ep, ep);
1329 if (!_ep) {
1330 DEBUG("%s, bad ep\n", __func__);
1331 return -ENODEV;
1332 }
1333
1334 DEBUG("%s, %d\n", __func__, ep_index(ep));
1335
1336 /* LPD can't report unclaimed bytes from IN fifos */
1337 if (ep_is_in(ep))
1338 return -EOPNOTSUPP;
1339
1340 usb_set_index(ep_index(ep));
1341
1342 csr = usb_read(ep->csr1);
1343 if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
1344 csr & USB_OUT_CSR1_OUT_PKT_RDY) {
1345 count = usb_read(USB_OUT_FIFO_WC1);
1346 }
1347
1348 return count;
1349 }
1350
1351 /** Flush EP FIFO
1352 * NOTE: Sets INDEX register to EP
1353 */
1354 static void lh7a40x_fifo_flush(struct usb_ep *_ep)
1355 {
1356 struct lh7a40x_ep *ep;
1357
1358 ep = container_of(_ep, struct lh7a40x_ep, ep);
1359 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1360 DEBUG("%s, bad ep\n", __func__);
1361 return;
1362 }
1363
1364 usb_set_index(ep_index(ep));
1365 flush(ep);
1366 }
1367
1368 /****************************************************************/
1369 /* End Point 0 related functions */
1370 /****************************************************************/
1371
1372 /* return: 0 = still running, 1 = completed, negative = errno */
1373 static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1374 {
1375 u32 max;
1376 unsigned count;
1377 int is_last;
1378
1379 max = ep_maxpacket(ep);
1380
1381 DEBUG_EP0("%s\n", __func__);
1382
1383 count = write_packet(ep, req, max);
1384
1385 /* last packet is usually short (or a zlp) */
1386 if (unlikely(count != max))
1387 is_last = 1;
1388 else {
1389 if (likely(req->req.length != req->req.actual) || req->req.zero)
1390 is_last = 0;
1391 else
1392 is_last = 1;
1393 }
1394
1395 DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
1396 ep->ep.name, count,
1397 is_last ? "/L" : "", req->req.length - req->req.actual, req);
1398
1399 /* requests complete when all IN data is in the FIFO */
1400 if (is_last) {
1401 done(ep, req, 0);
1402 return 1;
1403 }
1404
1405 return 0;
1406 }
1407
1408 static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
1409 unsigned char *cp, int max)
1410 {
1411 int bytes;
1412 int count = usb_read(USB_OUT_FIFO_WC1);
1413 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1414
1415 if (count > max)
1416 count = max;
1417 bytes = count;
1418 while (count--)
1419 *cp++ = *fifo & 0xFF;
1420 return bytes;
1421 }
1422
1423 static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
1424 unsigned char *cp, int count)
1425 {
1426 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1427 DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
1428 while (count--)
1429 *fifo = *cp++;
1430 }
1431
1432 static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1433 {
1434 u32 csr;
1435 u8 *buf;
1436 unsigned bufferspace, count, is_short;
1437 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1438
1439 DEBUG_EP0("%s\n", __func__);
1440
1441 csr = usb_read(USB_EP0_CSR);
1442 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
1443 return 0;
1444
1445 buf = req->req.buf + req->req.actual;
1446 prefetchw(buf);
1447 bufferspace = req->req.length - req->req.actual;
1448
1449 /* read all bytes from this packet */
1450 if (likely(csr & EP0_OUT_PKT_RDY)) {
1451 count = usb_read(USB_OUT_FIFO_WC1);
1452 req->req.actual += min(count, bufferspace);
1453 } else /* zlp */
1454 count = 0;
1455
1456 is_short = (count < ep->ep.maxpacket);
1457 DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
1458 ep->ep.name, csr, count,
1459 is_short ? "/S" : "", req, req->req.actual, req->req.length);
1460
1461 while (likely(count-- != 0)) {
1462 u8 byte = (u8) (*fifo & 0xff);
1463
1464 if (unlikely(bufferspace == 0)) {
1465 /* this happens when the driver's buffer
1466 * is smaller than what the host sent.
1467 * discard the extra data.
1468 */
1469 if (req->req.status != -EOVERFLOW)
1470 DEBUG_EP0("%s overflow %d\n", ep->ep.name,
1471 count);
1472 req->req.status = -EOVERFLOW;
1473 } else {
1474 *buf++ = byte;
1475 bufferspace--;
1476 }
1477 }
1478
1479 /* completion */
1480 if (is_short || req->req.actual == req->req.length) {
1481 done(ep, req, 0);
1482 return 1;
1483 }
1484
1485 /* finished that packet. the next one may be waiting... */
1486 return 0;
1487 }
1488
1489 /**
1490 * udc_set_address - set the USB address for this device
1491 * @address:
1492 *
1493 * Called from control endpoint function after it decodes a set address setup packet.
1494 */
1495 static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
1496 {
1497 DEBUG_EP0("%s: %d\n", __func__, address);
1498 /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
1499 dev->usb_address = address;
1500 usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
1501 usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
1502 /* usb_read(USB_FA); */
1503 }
1504
1505 /*
1506 * DATA_STATE_RECV (OUT_PKT_RDY)
1507 * - if error
1508 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1509 * - else
1510 * set EP0_CLR_OUT bit
1511 if last set EP0_DATA_END bit
1512 */
1513 static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
1514 {
1515 struct lh7a40x_request *req;
1516 struct lh7a40x_ep *ep = &dev->ep[0];
1517 int ret;
1518
1519 DEBUG_EP0("%s: %x\n", __func__, csr);
1520
1521 if (list_empty(&ep->queue))
1522 req = 0;
1523 else
1524 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1525
1526 if (req) {
1527
1528 if (req->req.length == 0) {
1529 DEBUG_EP0("ZERO LENGTH OUT!\n");
1530 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1531 dev->ep0state = WAIT_FOR_SETUP;
1532 return;
1533 }
1534 ret = read_fifo_ep0(ep, req);
1535 if (ret) {
1536 /* Done! */
1537 DEBUG_EP0("%s: finished, waiting for status\n",
1538 __func__);
1539
1540 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1541 dev->ep0state = WAIT_FOR_SETUP;
1542 } else {
1543 /* Not done yet.. */
1544 DEBUG_EP0("%s: not finished\n", __func__);
1545 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1546 }
1547 } else {
1548 DEBUG_EP0("NO REQ??!\n");
1549 }
1550 }
1551
1552 /*
1553 * DATA_STATE_XMIT
1554 */
1555 static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
1556 {
1557 struct lh7a40x_request *req;
1558 struct lh7a40x_ep *ep = &dev->ep[0];
1559 int ret, need_zlp = 0;
1560
1561 DEBUG_EP0("%s: %x\n", __func__, csr);
1562
1563 if (list_empty(&ep->queue))
1564 req = 0;
1565 else
1566 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1567
1568 if (!req) {
1569 DEBUG_EP0("%s: NULL REQ\n", __func__);
1570 return 0;
1571 }
1572
1573 if (req->req.length == 0) {
1574
1575 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1576 dev->ep0state = WAIT_FOR_SETUP;
1577 return 1;
1578 }
1579
1580 if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
1581 /* Next write will end with the packet size, */
1582 /* so we need Zero-length-packet */
1583 need_zlp = 1;
1584 }
1585
1586 ret = write_fifo_ep0(ep, req);
1587
1588 if (ret == 1 && !need_zlp) {
1589 /* Last packet */
1590 DEBUG_EP0("%s: finished, waiting for status\n", __func__);
1591
1592 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1593 dev->ep0state = WAIT_FOR_SETUP;
1594 } else {
1595 DEBUG_EP0("%s: not finished\n", __func__);
1596 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1597 }
1598
1599 if (need_zlp) {
1600 DEBUG_EP0("%s: Need ZLP!\n", __func__);
1601 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1602 dev->ep0state = DATA_STATE_NEED_ZLP;
1603 }
1604
1605 return 1;
1606 }
1607
1608 static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
1609 struct usb_ctrlrequest *ctrl)
1610 {
1611 struct lh7a40x_ep *ep0 = &dev->ep[0];
1612 struct lh7a40x_ep *qep;
1613 int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
1614 u16 val = 0;
1615
1616 if (reqtype == USB_RECIP_INTERFACE) {
1617 /* This is not supported.
1618 * And according to the USB spec, this one does nothing..
1619 * Just return 0
1620 */
1621 DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
1622 } else if (reqtype == USB_RECIP_DEVICE) {
1623 DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
1624 val |= (1 << 0); /* Self powered */
1625 /*val |= (1<<1); *//* Remote wakeup */
1626 } else if (reqtype == USB_RECIP_ENDPOINT) {
1627 int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
1628
1629 DEBUG_SETUP
1630 ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
1631 ep_num, ctrl->wLength);
1632
1633 if (ctrl->wLength > 2 || ep_num > 3)
1634 return -EOPNOTSUPP;
1635
1636 qep = &dev->ep[ep_num];
1637 if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
1638 && ep_index(qep) != 0) {
1639 return -EOPNOTSUPP;
1640 }
1641
1642 usb_set_index(ep_index(qep));
1643
1644 /* Return status on next IN token */
1645 switch (qep->ep_type) {
1646 case ep_control:
1647 val =
1648 (usb_read(qep->csr1) & EP0_SEND_STALL) ==
1649 EP0_SEND_STALL;
1650 break;
1651 case ep_bulk_in:
1652 case ep_interrupt:
1653 val =
1654 (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
1655 USB_IN_CSR1_SEND_STALL;
1656 break;
1657 case ep_bulk_out:
1658 val =
1659 (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
1660 USB_OUT_CSR1_SEND_STALL;
1661 break;
1662 }
1663
1664 /* Back to EP0 index */
1665 usb_set_index(0);
1666
1667 DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
1668 ctrl->wIndex, val);
1669 } else {
1670 DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
1671 return -EOPNOTSUPP;
1672 }
1673
1674 /* Clear "out packet ready" */
1675 usb_set((EP0_CLR_OUT), USB_EP0_CSR);
1676 /* Put status to FIFO */
1677 lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
1678 /* Issue "In packet ready" */
1679 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1680
1681 return 0;
1682 }
1683
1684 /*
1685 * WAIT_FOR_SETUP (OUT_PKT_RDY)
1686 * - read data packet from EP0 FIFO
1687 * - decode command
1688 * - if error
1689 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1690 * - else
1691 * set EP0_CLR_OUT | EP0_DATA_END bits
1692 */
1693 static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
1694 {
1695 struct lh7a40x_ep *ep = &dev->ep[0];
1696 struct usb_ctrlrequest ctrl;
1697 int i, bytes, is_in;
1698
1699 DEBUG_SETUP("%s: %x\n", __func__, csr);
1700
1701 /* Nuke all previous transfers */
1702 nuke(ep, -EPROTO);
1703
1704 /* read control req from fifo (8 bytes) */
1705 bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
1706
1707 DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
1708 DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
1709 ctrl.bRequestType == USB_DIR_IN);
1710 DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
1711 DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
1712 DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
1713 DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
1714
1715 /* Set direction of EP0 */
1716 if (likely(ctrl.bRequestType & USB_DIR_IN)) {
1717 ep->bEndpointAddress |= USB_DIR_IN;
1718 is_in = 1;
1719 } else {
1720 ep->bEndpointAddress &= ~USB_DIR_IN;
1721 is_in = 0;
1722 }
1723
1724 dev->req_pending = 1;
1725
1726 /* Handle some SETUP packets ourselves */
1727 switch (ctrl.bRequest) {
1728 case USB_REQ_SET_ADDRESS:
1729 if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1730 break;
1731
1732 DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
1733 udc_set_address(dev, ctrl.wValue);
1734 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1735 return;
1736
1737 case USB_REQ_GET_STATUS:{
1738 if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
1739 return;
1740
1741 case USB_REQ_CLEAR_FEATURE:
1742 case USB_REQ_SET_FEATURE:
1743 if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
1744 struct lh7a40x_ep *qep;
1745 int ep_num = (ctrl.wIndex & 0x0f);
1746
1747 /* Support only HALT feature */
1748 if (ctrl.wValue != 0 || ctrl.wLength != 0
1749 || ep_num > 3 || ep_num < 1)
1750 break;
1751
1752 qep = &dev->ep[ep_num];
1753 spin_unlock(&dev->lock);
1754 if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
1755 DEBUG_SETUP("SET_FEATURE (%d)\n",
1756 ep_num);
1757 lh7a40x_set_halt(&qep->ep, 1);
1758 } else {
1759 DEBUG_SETUP("CLR_FEATURE (%d)\n",
1760 ep_num);
1761 lh7a40x_set_halt(&qep->ep, 0);
1762 }
1763 spin_lock(&dev->lock);
1764 usb_set_index(0);
1765
1766 /* Reply with a ZLP on next IN token */
1767 usb_set((EP0_CLR_OUT | EP0_DATA_END),
1768 USB_EP0_CSR);
1769 return;
1770 }
1771 break;
1772 }
1773
1774 default:
1775 break;
1776 }
1777
1778 if (likely(dev->driver)) {
1779 /* device-2-host (IN) or no data setup command, process immediately */
1780 spin_unlock(&dev->lock);
1781 i = dev->driver->setup(&dev->gadget, &ctrl);
1782 spin_lock(&dev->lock);
1783
1784 if (i < 0) {
1785 /* setup processing failed, force stall */
1786 DEBUG_SETUP
1787 (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
1788 i);
1789 usb_set_index(0);
1790 usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
1791 USB_EP0_CSR);
1792
1793 /* ep->stopped = 1; */
1794 dev->ep0state = WAIT_FOR_SETUP;
1795 }
1796 }
1797 }
1798
1799 /*
1800 * DATA_STATE_NEED_ZLP
1801 */
1802 static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
1803 {
1804 DEBUG_EP0("%s: %x\n", __func__, csr);
1805
1806 /* c.f. Table 15-14 */
1807 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1808 dev->ep0state = WAIT_FOR_SETUP;
1809 }
1810
1811 /*
1812 * handle ep0 interrupt
1813 */
1814 static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
1815 {
1816 struct lh7a40x_ep *ep = &dev->ep[0];
1817 u32 csr;
1818
1819 /* Set index 0 */
1820 usb_set_index(0);
1821 csr = usb_read(USB_EP0_CSR);
1822
1823 DEBUG_EP0("%s: csr = %x\n", __func__, csr);
1824
1825 /*
1826 * For overview of what we should be doing see c.f. Chapter 18.1.2.4
1827 * We will follow that outline here modified by our own global state
1828 * indication which provides hints as to what we think should be
1829 * happening..
1830 */
1831
1832 /*
1833 * if SENT_STALL is set
1834 * - clear the SENT_STALL bit
1835 */
1836 if (csr & EP0_SENT_STALL) {
1837 DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr);
1838 usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
1839 nuke(ep, -ECONNABORTED);
1840 dev->ep0state = WAIT_FOR_SETUP;
1841 return;
1842 }
1843
1844 /*
1845 * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
1846 * - fill EP0 FIFO
1847 * - if last packet
1848 * - set IN_PKT_RDY | DATA_END
1849 * - else
1850 * set IN_PKT_RDY
1851 */
1852 if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
1853 DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
1854 __func__);
1855
1856 switch (dev->ep0state) {
1857 case DATA_STATE_XMIT:
1858 DEBUG_EP0("continue with DATA_STATE_XMIT\n");
1859 lh7a40x_ep0_in(dev, csr);
1860 return;
1861 case DATA_STATE_NEED_ZLP:
1862 DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
1863 lh7a40x_ep0_in_zlp(dev, csr);
1864 return;
1865 default:
1866 /* Stall? */
1867 DEBUG_EP0("Odd state!! state = %s\n",
1868 state_names[dev->ep0state]);
1869 dev->ep0state = WAIT_FOR_SETUP;
1870 /* nuke(ep, 0); */
1871 /* usb_set(EP0_SEND_STALL, ep->csr1); */
1872 break;
1873 }
1874 }
1875
1876 /*
1877 * if SETUP_END is set
1878 * - abort the last transfer
1879 * - set SERVICED_SETUP_END_BIT
1880 */
1881 if (csr & EP0_SETUP_END) {
1882 DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr);
1883
1884 usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
1885
1886 nuke(ep, 0);
1887 dev->ep0state = WAIT_FOR_SETUP;
1888 }
1889
1890 /*
1891 * if EP0_OUT_PKT_RDY is set
1892 * - read data packet from EP0 FIFO
1893 * - decode command
1894 * - if error
1895 * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
1896 * - else
1897 * set SERVICED_OUT_PKT_RDY | DATA_END bits
1898 */
1899 if (csr & EP0_OUT_PKT_RDY) {
1900
1901 DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__,
1902 csr);
1903
1904 switch (dev->ep0state) {
1905 case WAIT_FOR_SETUP:
1906 DEBUG_EP0("WAIT_FOR_SETUP\n");
1907 lh7a40x_ep0_setup(dev, csr);
1908 break;
1909
1910 case DATA_STATE_RECV:
1911 DEBUG_EP0("DATA_STATE_RECV\n");
1912 lh7a40x_ep0_out(dev, csr);
1913 break;
1914
1915 default:
1916 /* send stall? */
1917 DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
1918 dev->ep0state);
1919 break;
1920 }
1921 }
1922 }
1923
1924 static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
1925 {
1926 u32 csr;
1927
1928 usb_set_index(0);
1929 csr = usb_read(USB_EP0_CSR);
1930
1931 DEBUG_EP0("%s: %x\n", __func__, csr);
1932
1933 /* Clear "out packet ready" */
1934 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1935
1936 if (ep_is_in(ep)) {
1937 dev->ep0state = DATA_STATE_XMIT;
1938 lh7a40x_ep0_in(dev, csr);
1939 } else {
1940 dev->ep0state = DATA_STATE_RECV;
1941 lh7a40x_ep0_out(dev, csr);
1942 }
1943 }
1944
1945 /* ---------------------------------------------------------------------------
1946 * device-scoped parts of the api to the usb controller hardware
1947 * ---------------------------------------------------------------------------
1948 */
1949
1950 static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
1951 {
1952 u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
1953 u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
1954 DEBUG("%s, %p\n", __func__, _gadget);
1955 return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
1956 }
1957
1958 static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
1959 {
1960 /* host may not have enabled remote wakeup */
1961 /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
1962 return -EHOSTUNREACH;
1963 udc_set_mask_UDCCR(UDCCR_RSM); */
1964 return -ENOTSUPP;
1965 }
1966
1967 static const struct usb_gadget_ops lh7a40x_udc_ops = {
1968 .get_frame = lh7a40x_udc_get_frame,
1969 .wakeup = lh7a40x_udc_wakeup,
1970 /* current versions must always be self-powered */
1971 };
1972
1973 static void nop_release(struct device *dev)
1974 {
1975 DEBUG("%s %s\n", __func__, dev_name(dev));
1976 }
1977
1978 static struct lh7a40x_udc memory = {
1979 .usb_address = 0,
1980
1981 .gadget = {
1982 .ops = &lh7a40x_udc_ops,
1983 .ep0 = &memory.ep[0].ep,
1984 .name = driver_name,
1985 .dev = {
1986 .init_name = "gadget",
1987 .release = nop_release,
1988 },
1989 },
1990
1991 /* control endpoint */
1992 .ep[0] = {
1993 .ep = {
1994 .name = ep0name,
1995 .ops = &lh7a40x_ep_ops,
1996 .maxpacket = EP0_PACKETSIZE,
1997 },
1998 .dev = &memory,
1999
2000 .bEndpointAddress = 0,
2001 .bmAttributes = 0,
2002
2003 .ep_type = ep_control,
2004 .fifo = io_p2v(USB_EP0_FIFO),
2005 .csr1 = USB_EP0_CSR,
2006 .csr2 = USB_EP0_CSR,
2007 },
2008
2009 /* first group of endpoints */
2010 .ep[1] = {
2011 .ep = {
2012 .name = "ep1in-bulk",
2013 .ops = &lh7a40x_ep_ops,
2014 .maxpacket = 64,
2015 },
2016 .dev = &memory,
2017
2018 .bEndpointAddress = USB_DIR_IN | 1,
2019 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2020
2021 .ep_type = ep_bulk_in,
2022 .fifo = io_p2v(USB_EP1_FIFO),
2023 .csr1 = USB_IN_CSR1,
2024 .csr2 = USB_IN_CSR2,
2025 },
2026
2027 .ep[2] = {
2028 .ep = {
2029 .name = "ep2out-bulk",
2030 .ops = &lh7a40x_ep_ops,
2031 .maxpacket = 64,
2032 },
2033 .dev = &memory,
2034
2035 .bEndpointAddress = 2,
2036 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2037
2038 .ep_type = ep_bulk_out,
2039 .fifo = io_p2v(USB_EP2_FIFO),
2040 .csr1 = USB_OUT_CSR1,
2041 .csr2 = USB_OUT_CSR2,
2042 },
2043
2044 .ep[3] = {
2045 .ep = {
2046 .name = "ep3in-int",
2047 .ops = &lh7a40x_ep_ops,
2048 .maxpacket = 64,
2049 },
2050 .dev = &memory,
2051
2052 .bEndpointAddress = USB_DIR_IN | 3,
2053 .bmAttributes = USB_ENDPOINT_XFER_INT,
2054
2055 .ep_type = ep_interrupt,
2056 .fifo = io_p2v(USB_EP3_FIFO),
2057 .csr1 = USB_IN_CSR1,
2058 .csr2 = USB_IN_CSR2,
2059 },
2060 };
2061
2062 /*
2063 * probe - binds to the platform device
2064 */
2065 static int lh7a40x_udc_probe(struct platform_device *pdev)
2066 {
2067 struct lh7a40x_udc *dev = &memory;
2068 int retval;
2069
2070 DEBUG("%s: %p\n", __func__, pdev);
2071
2072 spin_lock_init(&dev->lock);
2073 dev->dev = &pdev->dev;
2074
2075 device_initialize(&dev->gadget.dev);
2076 dev->gadget.dev.parent = &pdev->dev;
2077
2078 the_controller = dev;
2079 platform_set_drvdata(pdev, dev);
2080
2081 udc_disable(dev);
2082 udc_reinit(dev);
2083
2084 /* irq setup after old hardware state is cleaned up */
2085 retval =
2086 request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
2087 dev);
2088 if (retval != 0) {
2089 DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
2090 IRQ_USBINTR, retval);
2091 return -EBUSY;
2092 }
2093
2094 create_proc_files();
2095
2096 return retval;
2097 }
2098
2099 static int lh7a40x_udc_remove(struct platform_device *pdev)
2100 {
2101 struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
2102
2103 DEBUG("%s: %p\n", __func__, pdev);
2104
2105 if (dev->driver)
2106 return -EBUSY;
2107
2108 udc_disable(dev);
2109 remove_proc_files();
2110
2111 free_irq(IRQ_USBINTR, dev);
2112
2113 platform_set_drvdata(pdev, 0);
2114
2115 the_controller = 0;
2116
2117 return 0;
2118 }
2119
2120 /*-------------------------------------------------------------------------*/
2121
2122 static struct platform_driver udc_driver = {
2123 .probe = lh7a40x_udc_probe,
2124 .remove = lh7a40x_udc_remove,
2125 /* FIXME power management support */
2126 /* .suspend = ... disable UDC */
2127 /* .resume = ... re-enable UDC */
2128 .driver = {
2129 .name = (char *)driver_name,
2130 .owner = THIS_MODULE,
2131 },
2132 };
2133
2134 static int __init udc_init(void)
2135 {
2136 DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION);
2137 return platform_driver_register(&udc_driver);
2138 }
2139
2140 static void __exit udc_exit(void)
2141 {
2142 platform_driver_unregister(&udc_driver);
2143 }
2144
2145 module_init(udc_init);
2146 module_exit(udc_exit);
2147
2148 MODULE_DESCRIPTION(DRIVER_DESC);
2149 MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
2150 MODULE_LICENSE("GPL");
2151 MODULE_ALIAS("platform:lh7a40x_udc");
connection oriented routing - ARCHIVE NO UPDATES HERE