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[cor_2_6_31.git] / arch / blackfin / include / asm / system.h
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1 /*
2 * File: include/asm/system.h
3 * Based on:
4 * Author: Tony Kou (tonyko@lineo.ca)
5 * Copyright (c) 2002 Arcturus Networks Inc.
6 * (www.arcturusnetworks.com)
7 * Copyright (c) 2003 Metrowerks (www.metrowerks.com)
8 * Copyright (c) 2004 Analog Device Inc.
9 * Created: 25Jan2001 - Tony Kou
10 * Description: system.h include file
12 * Modified: 22Sep2006 - Robin Getz
13 * - move include blackfin.h down, so I can get access to
14 * irq functions in other include files.
16 * Bugs: Enter bugs at http://blackfin.uclinux.org/
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; see the file COPYING.
30 * If not, write to the Free Software Foundation,
31 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 #ifndef _BLACKFIN_SYSTEM_H
35 #define _BLACKFIN_SYSTEM_H
37 #include <linux/linkage.h>
38 #include <linux/irqflags.h>
39 #include <mach/anomaly.h>
40 #include <asm/cache.h>
41 #include <asm/pda.h>
42 #include <asm/irq.h>
45 * Force strict CPU ordering.
47 #define nop() __asm__ __volatile__ ("nop;\n\t" : : )
48 #define mb() __asm__ __volatile__ ("" : : : "memory")
49 #define rmb() __asm__ __volatile__ ("" : : : "memory")
50 #define wmb() __asm__ __volatile__ ("" : : : "memory")
51 #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
52 #define read_barrier_depends() do { } while(0)
54 #ifdef CONFIG_SMP
55 asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
56 asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
57 asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
58 asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
59 unsigned long new, unsigned long old);
60 asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
61 unsigned long new, unsigned long old);
62 asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
63 unsigned long new, unsigned long old);
65 #ifdef __ARCH_SYNC_CORE_DCACHE
66 # define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
67 # define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
68 # define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
69 #define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
71 #else
72 # define smp_mb() barrier()
73 # define smp_rmb() barrier()
74 # define smp_wmb() barrier()
75 #define smp_read_barrier_depends() barrier()
76 #endif
78 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
79 int size)
81 unsigned long tmp;
83 switch (size) {
84 case 1:
85 tmp = __raw_xchg_1_asm(ptr, x);
86 break;
87 case 2:
88 tmp = __raw_xchg_2_asm(ptr, x);
89 break;
90 case 4:
91 tmp = __raw_xchg_4_asm(ptr, x);
92 break;
95 return tmp;
99 * Atomic compare and exchange. Compare OLD with MEM, if identical,
100 * store NEW in MEM. Return the initial value in MEM. Success is
101 * indicated by comparing RETURN with OLD.
103 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
104 unsigned long new, int size)
106 unsigned long tmp;
108 switch (size) {
109 case 1:
110 tmp = __raw_cmpxchg_1_asm(ptr, new, old);
111 break;
112 case 2:
113 tmp = __raw_cmpxchg_2_asm(ptr, new, old);
114 break;
115 case 4:
116 tmp = __raw_cmpxchg_4_asm(ptr, new, old);
117 break;
120 return tmp;
122 #define cmpxchg(ptr, o, n) \
123 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
124 (unsigned long)(n), sizeof(*(ptr))))
126 #else /* !CONFIG_SMP */
128 #define smp_mb() barrier()
129 #define smp_rmb() barrier()
130 #define smp_wmb() barrier()
131 #define smp_read_barrier_depends() do { } while(0)
133 struct __xchg_dummy {
134 unsigned long a[100];
136 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
138 #include <mach/blackfin.h>
140 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
141 int size)
143 unsigned long tmp = 0;
144 unsigned long flags;
146 local_irq_save_hw(flags);
148 switch (size) {
149 case 1:
150 __asm__ __volatile__
151 ("%0 = b%2 (z);\n\t"
152 "b%2 = %1;\n\t"
153 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
154 break;
155 case 2:
156 __asm__ __volatile__
157 ("%0 = w%2 (z);\n\t"
158 "w%2 = %1;\n\t"
159 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
160 break;
161 case 4:
162 __asm__ __volatile__
163 ("%0 = %2;\n\t"
164 "%2 = %1;\n\t"
165 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
166 break;
168 local_irq_restore_hw(flags);
169 return tmp;
172 #include <asm-generic/cmpxchg-local.h>
175 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
176 * them available.
178 #define cmpxchg_local(ptr, o, n) \
179 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
180 (unsigned long)(n), sizeof(*(ptr))))
181 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
183 #include <asm-generic/cmpxchg.h>
185 #endif /* !CONFIG_SMP */
187 #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
188 #define tas(ptr) ((void)xchg((ptr), 1))
190 #define prepare_to_switch() do { } while(0)
193 * switch_to(n) should switch tasks to task ptr, first checking that
194 * ptr isn't the current task, in which case it does nothing.
197 #include <asm/l1layout.h>
198 #include <asm/mem_map.h>
200 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
202 #ifndef CONFIG_SMP
203 #define switch_to(prev,next,last) \
204 do { \
205 memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
206 sizeof *L1_SCRATCH_TASK_INFO); \
207 memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
208 sizeof *L1_SCRATCH_TASK_INFO); \
209 (last) = resume (prev, next); \
210 } while (0)
211 #else
212 #define switch_to(prev, next, last) \
213 do { \
214 (last) = resume(prev, next); \
215 } while (0)
216 #endif
218 #endif /* _BLACKFIN_SYSTEM_H */