1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/pci_def.h>
5 #include <amdblocks/BiosCallOuts.h>
6 #include <console/console.h>
7 #include <soc/southbridge.h>
8 #include <soc/pci_devs.h>
10 #include <amdblocks/agesawrapper.h>
11 #include <amdblocks/dimm_spd.h>
12 #include <amdblocks/car.h>
16 void __weak
platform_FchParams_reset(FCH_RESET_DATA_BLOCK
*FchParams_reset
) {}
18 AGESA_STATUS
agesa_fch_initreset(uint32_t Func
, uintptr_t FchData
,
21 AMD_CONFIG_PARAMS
*StdHeader
= ConfigPtr
;
23 if (StdHeader
->Func
== AMD_INIT_RESET
) {
24 FCH_RESET_DATA_BLOCK
*FchParams_reset
;
25 FchParams_reset
= (FCH_RESET_DATA_BLOCK
*)FchData
;
26 printk(BIOS_DEBUG
, "Fch OEM config in INIT RESET ");
28 /* Get platform specific configuration changes */
29 platform_FchParams_reset(FchParams_reset
);
31 printk(BIOS_DEBUG
, "Done\n");
37 AGESA_STATUS
agesa_fch_initenv(uint32_t Func
, uintptr_t FchData
,
40 AMD_CONFIG_PARAMS
*StdHeader
= ConfigPtr
;
42 if (StdHeader
->Func
== AMD_INIT_ENV
) {
43 FCH_DATA_BLOCK
*FchParams_env
= (FCH_DATA_BLOCK
*)FchData
;
44 printk(BIOS_DEBUG
, "Fch OEM config in INIT ENV ");
46 /* XHCI configuration */
47 if (CONFIG(STONEYRIDGE_XHCI_ENABLE
))
48 FchParams_env
->Usb
.Xhci0Enable
= TRUE
;
50 FchParams_env
->Usb
.Xhci0Enable
= FALSE
;
51 FchParams_env
->Usb
.Xhci1Enable
= FALSE
;
53 /* SATA configuration */
54 FchParams_env
->Sata
.SataClass
= CONFIG_STONEYRIDGE_SATA_MODE
;
55 if (is_dev_enabled(DEV_PTR(sata
))) {
56 switch ((SATA_CLASS
)CONFIG_STONEYRIDGE_SATA_MODE
) {
61 FchParams_env
->Sata
.SataIdeMode
= FALSE
;
64 case SataIde2Ahci7804
:
65 default: /* SataNativeIde */
66 FchParams_env
->Sata
.SataIdeMode
= TRUE
;
70 FchParams_env
->Sata
.SataIdeMode
= FALSE
;
73 /* Platform updates */
74 platform_FchParams_env(FchParams_env
);
76 printk(BIOS_DEBUG
, "Done\n");
82 AGESA_STATUS
agesa_ReadSpd(uint32_t Func
, uintptr_t Data
, void *ConfigPtr
)
86 DEVTREE_CONST
struct device
*dev
;
87 DEVTREE_CONST
struct soc_amd_stoneyridge_config
*conf
;
88 AGESA_READ_SPD_PARAMS
*info
= ConfigPtr
;
91 return AGESA_UNSUPPORTED
;
93 dev
= pcidev_path_on_root(DCT_DEVFN
);
97 conf
= dev
->chip_info
;
101 if (info
->SocketId
>= ARRAY_SIZE(conf
->spd_addr_lookup
))
103 if (info
->MemChannelId
>= ARRAY_SIZE(conf
->spd_addr_lookup
[0]))
105 if (info
->DimmId
>= ARRAY_SIZE(conf
->spd_addr_lookup
[0][0]))
108 spd_address
= conf
->spd_addr_lookup
109 [info
->SocketId
][info
->MemChannelId
][info
->DimmId
];
110 if (spd_address
== 0)
113 err
= mainboard_read_spd(spd_address
, (void *)info
->Buffer
,
114 CONFIG_DIMM_SPD_SIZE
);
116 /* Read the SPD if the mainboard didn't fill the buffer */
117 if (err
|| (*info
->Buffer
== 0))
118 err
= sb_read_spd(spd_address
, (void *)info
->Buffer
,
119 CONFIG_DIMM_SPD_SIZE
);
124 return AGESA_SUCCESS
;
127 AGESA_STATUS
agesa_HaltThisAp(uint32_t Func
, uintptr_t Data
, void *ConfigPtr
)
129 AGESA_HALT_THIS_AP_PARAMS
*info
= ConfigPtr
;
132 if (info
->PrimaryCore
== TRUE
)
133 return AGESA_UNSUPPORTED
; /* force normal path */
134 if (info
->ExecWbinvd
== TRUE
)
136 if (info
->CacheEn
== TRUE
)
139 ap_teardown_car(flags
); /* does not return */
141 /* Should never reach here */
142 return AGESA_UNSUPPORTED
;
145 /* Allow mainboards to fill the SPD buffer */
146 __weak
int mainboard_read_spd(uint8_t spdAddress
, char *buf
,
149 printk(BIOS_DEBUG
, "WEAK: %s/%s called\n", __FILE__
, __func__
);
150 return -1; /* SPD not read */