src/soc/amd/stoneyridge/pstate_util.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/cpu.h>
   4 #include <amdblocks/smn.h>
   5 #include <cpu/amd/msr.h>
   6 #include <cpu/x86/msr.h>
   7 #include <device/pci_ops.h>
   8 #include <soc/msr.h>
   9 #include <soc/pci_devs.h>
  10 #include <types.h>
  11
  12 uint32_t get_pstate_0_reg(void)
  13 {
  14         return (pci_read_config32(SOC_PM_DEV, CORE_PERF_BOOST_CTRL) >> 2) & 0x7;
  15 }
  16
  17 static bool all_pstates_have_same_frequency_id(void)
  18 {
  19         union pstate_msr pstate_reg;
  20         size_t i;
  21         bool first = true;
  22         uint32_t frequency_id;
  23
  24         for (i = 0; i < PSTATE_MSR_COUNT; i++) {
  25                 pstate_reg.raw = rdmsr(PSTATE_MSR(i)).raw;
  26
  27                 if (!pstate_reg.pstate_en)
  28                         continue;
  29
  30                 if (first) {
  31                         frequency_id = pstate_reg.cpu_fid_0_5;
  32                         first = false;
  33                 } else if (frequency_id != pstate_reg.cpu_fid_0_5) {
  34                         return false;
  35                 }
  36         }
  37
  38         return true;
  39 }
  40
  41 #define CLK_PLL_LOCK_TIMER              0xD82220B8
  42 #define CLK_GATER_SEQUENCE_REGISTER     0xD8222114
  43
  44 uint32_t get_pstate_latency(void)
  45 {
  46         uint32_t latency = 0;
  47         uint32_t smn_data;
  48         uint32_t gaters_on_time, gaters_off_time;
  49
  50         smn_data = smn_read32(CLK_GATER_SEQUENCE_REGISTER);
  51         gaters_on_time = (smn_data & 0xff) * 10;
  52         gaters_off_time = (smn_data >> 8 & 0xff) * 10;
  53         latency += DIV_ROUND_UP(15 * gaters_on_time, 1000);
  54         latency += DIV_ROUND_UP(15 * gaters_off_time, 1000);
  55
  56         if (!all_pstates_have_same_frequency_id()) {
  57                 smn_data = smn_read32(CLK_PLL_LOCK_TIMER);
  58                 latency += DIV_ROUND_UP(smn_data & 0x1fff, 100);
  59         }
  60
  61         return latency;
  62 }