1 ## SPDX-License-Identifier: GPL-2.0-only
3 config SOC_MEDIATEK_COMMON
5 select NO_ECAM_MMCONF_SUPPORT if PCI
7 common code blocks for Mediatek SOCs
11 config MEDIATEK_DRAM_ADAPTIVE
13 default n if SOC_MEDIATEK_MT8173
14 default n if SOC_MEDIATEK_MT8183
15 default n if SOC_MEDIATEK_MT8192
18 Starting from MT8195, MediaTek platform supports "dram adaptive" to
19 automatically detect dram information, including channel, rank, die
20 size..., and can automatically configure EMI settings. So we can just
21 pass a placeholder param blob to `mt_mem_init_run` by enabling this
23 Platforms (MT8173, MT8183, MT8192) which do not support "dram adaptive"
24 need to implement `get_sdram_config` to get the DRAM configuration info.
26 config MEDIATEK_DRAM_DVFS
30 This option enables DRAM calibration with multiple frequencies (low,
31 medium and high frequency groups, with total 7 frequencies) for DVFS
32 feature. All supported data rates are: 800, 1200, 1600, 1866, 2400,
35 config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT
38 depends on MEDIATEK_DRAM_DVFS
40 This options limit DRAM frequency calibration count from total 7 to 3,
41 other frequency will directly use the low frequency shu result.
43 config MEDIATEK_DRAM_BLOB_FAST_INIT
44 bool "Enable running fast calibration by blob"
47 This option allows performing fast calibration through different
50 config MEDIATEK_DRAM_SCRAMBLE
51 bool "Enable DRAM scramble feature"
54 This option enables DRAM data scramble, which can prevent DRAM data from
61 This option enables memory basic compare test to verify the DRAM read
62 or write is as expected.
64 config DPM_FOUR_CHANNEL
68 This option enables four channel configuration for DPM.
71 bool "Enable MediaTek DFD (Design For Debug) settings"
73 DFD (Design for Debug) is a debugging tool, which scans flip-flops
74 and dumps to internal RAM on the WDT reset. We reserve 1MB on DRAM
77 config USE_CBMEM_DRAM_INFO
78 bool "Support filling dram information to cbmem"
80 The DRAM initialization will keep and return DRAM information (size,
81 geometry and other DDR info) so we can fill that into the CBMEM.
83 config FLASH_DUAL_IO_READ
87 When this option is enabled, the flash controller provides the ability
90 config PWRAP_WITH_PMIF_SPMI
94 When this option is enabled, the PMIC interface only supports PWRAP
97 config PMIF_SPMI_IOCFG_DEFAULT_SETTING
101 For SoCs where IO pins default to PMIF_SPMI mode, enable this option
102 to skip software PMIF_SPMI IO pins configuration.
108 When this option is enabled, the DEVAPC driver prints the settings after
111 config EARLY_MMU_INIT
115 When this option is enabled, `mtk_mmu_init()` will be done in
116 `bootblock_soc_early_init()` to reduce the boot time.