1 coreboot 4.10 release notes
2 ===========================
4 The 4.10 release covers commit a2faaa9a2 to commit ae317695e3
5 There is a pgp signed 4.10 tag in the git repository, and a branch will
8 In nearly 8 months since 4.9 we had 198 authors commit 2538 changes
9 to master. Of these, 85 authors made their first commit to coreboot:
12 Between the releases the tree grew by about 11000 lines of code plus
13 5000 lines of comments.
15 Again, a big Thank You to all contributors who helped shape the coreboot
16 project, community and code with their effort, no matter if through
17 development, review, testing, documentation or by helping people asking
18 questions on our venues like IRC or our mailing list.
23 Most of the changes were to mainboards, and on the chipset side, lots
24 of activity concentrated on x86. However compared to previous releases
25 activity (and therefore interest, probably) increased in vboot and in
26 non-x86 architectures. However it's harder this time to give this release
27 a single topic like the last: This release accumulates some of everything.
31 As usual, there was a lot of cleaning up going on, and there notably,
32 a good chunk of this year's Google Summer of Code project to clean out
33 the issues reported by Coverity Scan is already in.
35 The only larger scale change that was registered in the pre-release
36 notes was also about cleaning up the tree:
38 ### `device_t` is no more
39 coreboot used to have a data type, `device_t` that changed shape depending on
40 whether it is compiled for romstage (with limited memory) or ramstage (with
41 unlimited memory as far as coreboot is concerned). It's an old relic from the
42 time when romstage wasn't operated in Cache-As-RAM mode, but compiled with
45 That data type is now gone.
47 Release Notes maintenance
48 -------------------------
49 Speaking of pre-release notes: After 4.10 we'll start a document for
50 4.11 in the git repository. Feel free to add notable achievements there
51 so we remember to give them a shout out in the next release's notes.
55 Sadly, Google Cyan is broken in this release. It doesn't work with the
56 "C environment" bootblock (as compared to the old romcc type bootblock)
57 which is now the default. Sadly it doesn't help to simply revert that
58 change because doing so breaks other boards.
60 If you want to use Google Cyan with the release (or if
61 you're tracking the master branch), please keep an eye on
62 https://review.coreboot.org/c/coreboot/+/34304 where a solution for this
67 As announced in the 4.9 release notes, there are no deprecations after 4.10.
68 While 4.10 is also released late and we target a 4.11 release in October we
69 nonetheless want to announce deprecations this time: These are under
70 discussion since January, people are working on mitigations for about as long
71 and so it should be possible to resolve the outstanding issues by the end of
74 Specifically, we want to require code to work with the following Kconfig
75 options so we can remove the options and the code they disable:
77 * C\_ENVIRONMENT\_BOOTBLOCK
78 * NO\_CAR\_GLOBAL\_MIGRATION
79 * RELOCATABLE\_RAMSTAGE
81 These only affect x86. If your platform only works without them, please
82 look into fixing that.
93 * GIGABYTE GA-H61MA-D3V
104 * HP COMPAQ-8200-ELITE-SFF-PC
105 * INTEL COMETLAKE-RVP
113 * SUPERMICRO X10SLM-PLUS-F
116 Removed 7 mainboards:
117 ---------------------
126 Removed 3 processors:
127 ---------------------
128 * src/cpu/amd/geode\_lx
129 * src/cpu/intel/model\_69x
130 * src/cpu/intel/model\_6dx
134 * src/soc/amd/picasso
135 * src/soc/qualcomm/qcs405
139 * Update to gcc 8.3.0, binutils 2.32, IASL 20190509, clang 8