3 * Copyright (C) 2014 Rockchip Electronics
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include "generic_hub.h"
17 #include "dwc2_private.h"
21 dwc2_rh_port_status_changed(usbdev_t
*const dev
, const int port
)
25 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
27 hprt
.d32
= readl(dwc2
->hprt0
);
28 changed
= hprt
.prtconndet
;
30 /* Clear connect detect flag */
32 hprt
.d32
&= HPRT_W1C_MASK
;
34 writel(hprt
.d32
, dwc2
->hprt0
);
40 dwc2_rh_port_connected(usbdev_t
*const dev
, const int port
)
43 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
45 hprt
.d32
= readl(dwc2
->hprt0
);
46 return hprt
.prtconnsts
;
50 dwc2_rh_port_in_reset(usbdev_t
*const dev
, const int port
)
53 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
55 hprt
.d32
= readl(dwc2
->hprt0
);
60 dwc2_rh_port_enabled(usbdev_t
*const dev
, const int port
)
63 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
65 hprt
.d32
= readl(dwc2
->hprt0
);
70 dwc2_rh_port_speed(usbdev_t
*const dev
, const int port
)
73 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
75 hprt
.d32
= readl(dwc2
->hprt0
);
77 switch (hprt
.prtspd
) {
90 dwc2_rh_reset_port(usbdev_t
*const dev
, const int port
)
93 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
95 hprt
.d32
= readl(dwc2
->hprt0
);
96 hprt
.d32
&= HPRT_W1C_MASK
;
98 writel(hprt
.d32
, dwc2
->hprt0
);
100 /* Wait a bit while reset is active. */
103 /* Deassert reset. */
105 writel(hprt
.d32
, dwc2
->hprt0
);
108 * If reset and speed enum success the DWC2 core will set enable bit
109 * after port reset bit is deasserted
112 hprt
.d32
= readl(dwc2
->hprt0
);
113 usb_debug("%s reset port ok, hprt = 0x%08x\n", __func__
, hprt
.d32
);
116 usb_debug("%s enable port fail! hprt = 0x%08x\n",
125 dwc2_rh_enable_port(usbdev_t
*const dev
, const int port
)
128 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
130 /* Power on the port */
131 hprt
.d32
= readl(dwc2
->hprt0
);
132 hprt
.d32
&= HPRT_W1C_MASK
;
134 writel(hprt
.d32
, dwc2
->hprt0
);
139 dwc2_rh_disable_port(usbdev_t
*const dev
, const int port
)
142 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
144 hprt
.d32
= readl(dwc2
->hprt0
);
145 hprt
.d32
&= HPRT_W1C_MASK
;
146 /* Disable the port*/
148 /* Power off the port */
150 writel(hprt
.d32
, dwc2
->hprt0
);
154 static const generic_hub_ops_t dwc2_rh_ops
= {
155 .hub_status_changed
= NULL
,
156 .port_status_changed
= dwc2_rh_port_status_changed
,
157 .port_connected
= dwc2_rh_port_connected
,
158 .port_in_reset
= dwc2_rh_port_in_reset
,
159 .port_enabled
= dwc2_rh_port_enabled
,
160 .port_speed
= dwc2_rh_port_speed
,
161 .enable_port
= dwc2_rh_enable_port
,
162 .disable_port
= dwc2_rh_disable_port
,
163 .start_port_reset
= NULL
,
164 .reset_port
= dwc2_rh_reset_port
,
168 dwc2_rh_init(usbdev_t
*dev
)
170 dwc_ctrl_t
*const dwc2
= DWC2_INST(dev
->controller
);
172 /* we can set them here because a root hub _really_ shouldn't
178 generic_hub_init(dev
, 1, &dwc2_rh_ops
);
179 usb_debug("dwc2_rh_init HPRT 0x%08x p = %p\n ",
180 readl(dwc2
->hprt0
), dwc2
->hprt0
);
181 usb_debug("DWC2: root hub init done\n");