mb/google/brya/var/omnigul: Modify NVMe and UFS Storage support
[coreboot.git] / payloads / libpayload / drivers / usb / uhci_rh.c
blobe7f0da76668c1be3931207c864982d5e7927ecc0
1 /*
3 * Copyright (C) 2008-2010 coresystems GmbH
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
29 //#define USB_DEBUG
31 #include <libpayload.h>
32 #include "uhci.h"
33 #include "uhci_private.h"
35 typedef struct {
36 int port[2];
37 } rh_inst_t;
39 #define RH_INST(dev) ((rh_inst_t*)(dev)->data)
41 static void
42 uhci_rh_enable_port(usbdev_t *dev, int port)
44 u16 value;
45 hci_t *controller = dev->controller;
46 if (port == 1)
47 port = PORTSC1;
48 else if (port == 2)
49 port = PORTSC2;
50 else {
51 usb_debug("Invalid port %d\n", port);
52 return;
55 uhci_reg_write16(controller, port,
56 uhci_reg_read16(controller, port) & ~(1 << 12)); /* wakeup */
58 uhci_reg_write16(controller, port,
59 uhci_reg_read16(controller, port) | 1 << 9); /* reset */
60 mdelay(30); // >10ms
61 uhci_reg_write16(controller, port,
62 uhci_reg_read16(controller, port) & ~(1 << 9));
63 mdelay(1); // >5.3us per spec, <3ms because some devices make trouble
65 uhci_reg_write16(controller, port,
66 uhci_reg_read16(controller, port) | 1 << 2); /* enable */
67 /* wait for controller to enable port */
68 /* TOTEST: how long to wait? 100ms for now */
69 int timeout = 200; /* time out after 200 * 500us == 100ms */
70 do {
71 value = uhci_reg_read16(controller, port);
72 udelay(500); timeout--;
73 } while (((value & (1 << 2)) == 0) && (value & 0x01) && timeout);
74 if (!timeout)
75 usb_debug("Warning: uhci_rh: port enabling timed out.\n");
78 /* disable root hub */
79 static void
80 uhci_rh_disable_port(usbdev_t *dev, int port)
82 hci_t *controller = dev->controller;
83 if (port == 1)
84 port = PORTSC1;
85 else if (port == 2)
86 port = PORTSC2;
87 else {
88 usb_debug("Invalid port %d\n", port);
89 return;
91 uhci_reg_write16(controller, port,
92 uhci_reg_read16(controller, port) & ~4);
93 u16 value;
94 /* wait for controller to disable port */
95 /* TOTEST: how long to wait? 100ms for now */
96 int timeout = 200; /* time out after 200 * 500us == 100ms */
97 do {
98 value = uhci_reg_read16(controller, port);
99 udelay(500); timeout--;
100 } while (((value & (1 << 2)) != 0) && timeout);
101 if (!timeout)
102 usb_debug("Warning: uhci_rh: port disabling timed out.\n");
105 static void
106 uhci_rh_scanport(usbdev_t *dev, int port)
108 int portsc, offset;
109 if (port == 1) {
110 portsc = PORTSC1;
111 offset = 0;
112 } else if (port == 2) {
113 portsc = PORTSC2;
114 offset = 1;
115 } else {
116 usb_debug("Invalid port %d\n", port);
117 return;
119 int devno = RH_INST(dev)->port[offset];
120 if ((devno != -1) && (dev->controller->devices[devno] != 0)) {
121 usb_detach_device(dev->controller, devno);
122 RH_INST(dev)->port[offset] = -1;
124 uhci_reg_write16(dev->controller, portsc,
125 uhci_reg_read16(dev->controller, portsc) | (1 << 3) | (1 << 2)); // clear port state change, enable port
127 mdelay(100); // wait for signal to stabilize
129 if ((uhci_reg_read16(dev->controller, portsc) & 1) != 0) {
130 // device attached
132 uhci_rh_disable_port(dev, port);
133 uhci_rh_enable_port(dev, port);
135 usb_speed speed = ((uhci_reg_read16(dev->controller, portsc) >> 8) & 1);
137 RH_INST(dev)->port[offset] = usb_attach_device(dev->controller, dev->address, portsc, speed);
141 static int
142 uhci_rh_report_port_changes(usbdev_t *dev)
144 u16 stored, real;
146 stored = (RH_INST(dev)->port[0] == -1);
147 real = ((uhci_reg_read16(dev->controller, PORTSC1) & 1) == 0);
148 if (stored != real) {
149 usb_debug("change on port 1\n");
150 return 1;
153 stored = (RH_INST(dev)->port[1] == -1);
154 real = ((uhci_reg_read16(dev->controller, PORTSC2) & 1) == 0);
155 if (stored != real) {
156 usb_debug("change on port 2\n");
157 return 2;
160 // maybe detach+attach happened between two scans?
162 if ((uhci_reg_read16(dev->controller, PORTSC1) & 2) > 0) {
163 usb_debug("possibly re-attached on port 1\n");
164 return 1;
166 if ((uhci_reg_read16(dev->controller, PORTSC2) & 2) > 0) {
167 usb_debug("possibly re-attached on port 2\n");
168 return 2;
171 // no change
172 return -1;
175 static void
176 uhci_rh_destroy(usbdev_t *dev)
178 usb_detach_device(dev->controller, 1);
179 usb_detach_device(dev->controller, 2);
180 uhci_rh_disable_port(dev, 1);
181 uhci_rh_disable_port(dev, 2);
182 free(RH_INST(dev));
185 static void
186 uhci_rh_poll(usbdev_t *dev)
188 int port;
189 while ((port = uhci_rh_report_port_changes(dev)) != -1)
190 uhci_rh_scanport(dev, port);
193 void
194 uhci_rh_init(usbdev_t *dev)
196 dev->destroy = uhci_rh_destroy;
197 dev->poll = uhci_rh_poll;
199 uhci_rh_enable_port(dev, 1);
200 uhci_rh_enable_port(dev, 2);
201 dev->data = xmalloc(sizeof(rh_inst_t));
203 RH_INST(dev)->port[0] = -1;
204 RH_INST(dev)->port[1] = -1;
206 /* we can set them here because a root hub _really_ shouldn't
207 appear elsewhere */
208 dev->address = 0;
209 dev->hub = -1;
210 dev->port = -1;