mb/google/brya/var/omnigul: Modify NVMe and UFS Storage support
[coreboot.git] / src / mainboard / google / brya / variants / omnigul / overridetree.cb
blobd243668455e6827b6324f83879a37110ce746bf4
1 fw_config
2 field STORAGE 2 3
3 option STORAGE_UNKNOWN 0
4 option STORAGE_UFS 1
5 option STORAGE_NVME 2
6 end
7 end
9 chip soc/intel/alderlake
11 register "sagv" = "SaGv_Enabled"
13 register "serial_io_i2c_mode" = "{
14 [PchSerialIoIndexI2C0] = PchSerialIoPci,
15 [PchSerialIoIndexI2C1] = PchSerialIoPci,
16 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
17 [PchSerialIoIndexI2C3] = PchSerialIoPci,
18 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
19 [PchSerialIoIndexI2C5] = PchSerialIoPci,
22 # SOC Aux orientation override:
23 # This is a bitfield that corresponds to up to 4 TCSS ports.
24 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
25 # TcssAuxOri = 0101b
26 # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
27 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
28 # motherboard to USBC connector
29 register "tcss_aux_ori" = "1"
30 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
32 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2 Port 2
33 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable USB2 Port 3
34 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4
35 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2 Port 6
36 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
37 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port 8
39 register "usb3_ports[0]" = "USB3_PORT_EMPTY" # Disable USB3 Port 0
40 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
41 register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Disable USB3 Port 2
42 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable USB3 Port 3
44 register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)" # Type C port C0
45 register "tcss_ports[1]" = "TCSS_PORT_EMPTY" # Disable Port1
46 register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC1)" # Type C port C1
47 register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable Port3
49 # FIVR configurations for brya are disabled since the board doesn't have V1p05 and Vnn
50 # bypass rails implemented.
51 register "ext_fivr_settings" = "{
52 .configure_ext_fivr = 1,
55 # Enable the Cnvi BT Audio Offload
56 register "cnvi_bt_audio_offload" = "1"
58 device domain 0 on
59 device ref i2c0 on
60 chip drivers/i2c/generic
61 register "hid" = ""RTL5682""
62 register "name" = ""RT58""
63 register "desc" = ""Realtek RT5682""
64 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)"
65 register "property_count" = "1"
66 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
67 register "property_list[0].name" = ""realtek,jd-src""
68 register "property_list[0].integer" = "1"
69 device i2c 1a on end
70 end
71 chip drivers/generic/alc1015
72 register "hid" = ""RTL1019""
73 register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
74 device generic 1 on end
75 end
76 end #I2C0
77 device ref i2c1 on
78 chip drivers/i2c/tpm
79 register "hid" = ""GOOG0005""
80 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
81 device i2c 50 on end
82 end
83 end #I2C1
84 device ref i2c3 on
85 chip drivers/i2c/hid
86 register "generic.hid" = ""GTCH7503""
87 register "generic.desc" = ""G2TOUCH Touchscreen""
88 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
89 register "generic.probed" = "1"
90 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
91 register "generic.reset_delay_ms" = "50"
92 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
93 register "generic.enable_delay_ms" = "1"
94 register "generic.has_power_resource" = "1"
95 register "hid_desc_reg_offset" = "0x01"
96 device i2c 40 on end
97 end
98 end #I2C3
99 device ref i2c5 on
100 chip drivers/i2c/generic
101 register "hid" = ""ELAN0000""
102 register "desc" = ""ELAN Touchpad""
103 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
104 register "wake" = "GPE0_DW2_14"
105 register "detect" = "1"
106 device i2c 15 on end
108 chip drivers/i2c/hid
109 register "generic.hid" = ""SYNA0000""
110 register "generic.cid" = ""ACPI0C50""
111 register "generic.desc" = ""Synaptics Touchpad""
112 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
113 register "generic.wake" = "GPE0_DW2_14"
114 register "generic.detect" = "1"
115 register "hid_desc_reg_offset" = "0x20"
116 device i2c 2c on end
118 end #I2C5
119 device ref pcie_rp8 off end
120 device ref pcie_rp11 on
121 register "pch_pcie_rp[PCH_RP(11)]" = "{
122 .clk_src = 1,
123 .clk_req = 1,
124 .flags = PCIE_RP_LTR | PCIE_RP_AER,
126 probe STORAGE STORAGE_UNKNOWN
127 probe STORAGE STORAGE_NVME
129 device ref ish on
130 chip drivers/intel/ish
131 register "add_acpi_dma_property" = "true"
132 device generic 0 on end
134 probe STORAGE STORAGE_UNKNOWN
135 probe STORAGE STORAGE_UFS
137 device ref ufs on
138 probe STORAGE STORAGE_UNKNOWN
139 probe STORAGE STORAGE_UFS
141 device ref tbt_pcie_rp0 off end
142 device ref tbt_pcie_rp1 off end
143 device ref tbt_pcie_rp2 off end
144 device ref tcss_dma0 off end
145 device ref tcss_dma1 off end
146 device ref pch_espi on
147 chip ec/google/chromeec
148 use conn0 as mux_conn[0]
149 use conn1 as mux_conn[2]
150 device pnp 0c09.0 on end
153 device ref pmc hidden
154 chip drivers/intel/pmc_mux
155 device generic 0 on
156 chip drivers/intel/pmc_mux/conn
157 use usb2_port1 as usb2_port
158 use tcss_usb3_port1 as usb3_port
159 device generic 0 alias conn0 on end
161 chip drivers/intel/pmc_mux/conn
162 use usb2_port2 as usb2_port
163 use tcss_usb3_port3 as usb3_port
164 device generic 1 alias conn1 on end
169 device ref tcss_xhci on
170 chip drivers/usb/acpi
171 device ref tcss_root_hub on
172 chip drivers/usb/acpi
173 register "desc" = ""USB3 Type-C Port C0 (MLB)""
174 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
175 register "use_custom_pld" = "true"
176 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
177 device ref tcss_usb3_port1 on end
179 chip drivers/usb/acpi
180 register "desc" = ""USB3 Type-C Port C1 (DB)""
181 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
182 register "use_custom_pld" = "true"
183 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
184 device ref tcss_usb3_port3 on end
189 device ref xhci on
190 chip drivers/usb/acpi
191 device ref xhci_root_hub on
192 chip drivers/usb/acpi
193 register "desc" = ""USB2 Type-C Port C0 (MLB)""
194 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
195 register "use_custom_pld" = "true"
196 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
197 device ref usb2_port1 on end
199 chip drivers/usb/acpi
200 register "desc" = ""USB2 Type-C Port C1 (DB)""
201 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
202 register "use_custom_pld" = "true"
203 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
204 device ref usb2_port2 on end
206 chip drivers/usb/acpi
207 register "desc" = ""USB2 Camera""
208 register "type" = "UPC_TYPE_INTERNAL"
209 device ref usb2_port6 on end
211 chip drivers/usb/acpi
212 register "desc" = ""USB2 Type-A Port A0 (MLB)""
213 register "type" = "UPC_TYPE_A"
214 register "use_custom_pld" = "true"
215 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
216 device ref usb2_port8 on end
218 chip drivers/usb/acpi
219 register "desc" = ""USB2 Bluetooth""
220 register "type" = "UPC_TYPE_INTERNAL"
221 register "reset_gpio" =
222 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
223 device ref usb2_port10 on end
225 chip drivers/usb/acpi
226 register "desc" = ""USB3 Type-A Port A0 (MLB)""
227 register "type" = "UPC_TYPE_USB3_A"
228 register "use_custom_pld" = "true"
229 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
230 device ref usb3_port1 on end