1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
5 #include <cpu/intel/cpu_ids.h>
6 #include <cpu/intel/microcode.h>
7 #include <cpu/x86/msr.h>
8 #include <cpu/x86/name.h>
9 #include <device/pci.h>
10 #include <device/pci_ids.h>
11 #include <device/pci_ops.h>
12 #include <soc/pci_devs.h>
13 #include <soc/romstage.h>
19 { CPUID_APOLLOLAKE_A0
, "Apollolake A0" },
20 { CPUID_APOLLOLAKE_B0
, "Apollolake B0" },
21 { CPUID_APOLLOLAKE_E0
, "Apollolake E0" },
22 { CPUID_GLK_A0
, "Geminilake A0" },
23 { CPUID_GLK_B0
, "Geminilake B0" },
24 { CPUID_GLK_R0
, "Geminilake R0" },
31 { PCI_DID_INTEL_GLK_NB
, "Geminilake" },
32 { PCI_DID_INTEL_APL_NB
, "Apollolake" },
39 { PCI_DID_INTEL_APL_LPC
, "Apollolake" },
40 { PCI_DID_INTEL_GLK_LPC
, "Geminilake" },
41 { PCI_DID_INTEL_GLK_ESPI
, "Geminilake" },
48 { PCI_DID_INTEL_APL_IGD_HD_505
, "Apollolake HD 505" },
49 { PCI_DID_INTEL_APL_IGD_HD_500
, "Apollolake HD 500" },
50 { PCI_DID_INTEL_GLK_IGD
, "Geminilake" },
51 { PCI_DID_INTEL_GLK_IGD_EU12
, "Geminilake EU12" },
54 static uint8_t get_dev_revision(pci_devfn_t dev
)
56 return pci_read_config8(dev
, PCI_REVISION_ID
);
59 static uint16_t get_dev_id(pci_devfn_t dev
)
61 return pci_read_config16(dev
, PCI_DEVICE_ID
);
64 static void report_cpu_info(void)
66 uint32_t i
, cpu_id
, cpu_feature_flag
;
68 const char *support
= "Supported";
69 const char *no_support
= "Not Supported";
70 const char *cpu_type
= "Unknown";
72 fill_processor_name(cpu_name
);
73 cpu_id
= cpu_get_cpuid();
75 /* Look for string to match the name */
76 for (i
= 0; i
< ARRAY_SIZE(cpu_table
); i
++) {
77 if (cpu_table
[i
].cpuid
== cpu_id
) {
78 cpu_type
= cpu_table
[i
].name
;
83 printk(BIOS_INFO
, "CPU: %s\n", cpu_name
);
84 printk(BIOS_INFO
, "CPU: ID %x, %s, ucode: %08x\n", cpu_id
, cpu_type
,
85 get_current_microcode_rev());
87 cpu_feature_flag
= cpu_get_feature_flags_ecx();
88 printk(BIOS_INFO
, "CPU: AES %s, TXT %s, VT %s\n",
89 (cpu_feature_flag
& CPUID_AES
) ? support
: no_support
,
90 (cpu_feature_flag
& CPUID_SMX
) ? support
: no_support
,
91 (cpu_feature_flag
& CPUID_VMX
) ? support
: no_support
);
94 static void report_mch_info(void)
97 pci_devfn_t dev
= SA_DEV_ROOT
;
98 uint16_t mchid
= get_dev_id(dev
);
99 uint8_t mch_revision
= get_dev_revision(dev
);
100 const char *mch_type
= "Unknown";
102 for (i
= 0; i
< ARRAY_SIZE(mch_table
); i
++) {
103 if (mch_table
[i
].mchid
== mchid
) {
104 mch_type
= mch_table
[i
].name
;
109 printk(BIOS_INFO
, "MCH: device id %04x (rev %02x) is %s\n",
110 mchid
, mch_revision
, mch_type
);
113 static void report_pch_info(void)
116 pci_devfn_t dev
= PCH_DEV_LPC
;
117 uint16_t lpcid
= get_dev_id(dev
);
118 const char *pch_type
= "Unknown";
120 for (i
= 0; i
< ARRAY_SIZE(pch_table
); i
++) {
121 if (pch_table
[i
].lpcid
== lpcid
) {
122 pch_type
= pch_table
[i
].name
;
126 printk(BIOS_INFO
, "PCH: device id %04x (rev %02x) is %s\n",
127 lpcid
, get_dev_revision(dev
), pch_type
);
130 static void report_igd_info(void)
133 pci_devfn_t dev
= SA_DEV_IGD
;
134 uint16_t igdid
= get_dev_id(dev
);
135 const char *igd_type
= "Unknown";
137 for (i
= 0; i
< ARRAY_SIZE(igd_table
); i
++) {
138 if (igd_table
[i
].igdid
== igdid
) {
139 igd_type
= igd_table
[i
].name
;
143 printk(BIOS_INFO
, "IGD: device id %04x (rev %02x) is %s\n",
144 igdid
, get_dev_revision(dev
), igd_type
);
147 void report_platform_info(void)