mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / braswell / acpi / lpe.asl
blob9f400458c359574e643e61e3daec936d08d4c5eb
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 Device (LPEA)
5         Name (_HID, "808622A8")
6         Name (_CID, "808622A8")
7         Name (_UID, 1)
8         Name (_DDN, "Intel(R) Low Power Audio Controller - 808622A8")
9         Name (_PR0, Package () { PLPE })
11         Name (RBUF, ResourceTemplate()
12         {
13                 Memory32Fixed (ReadWrite, 0, 0x00200000, BAR0)
14                 Memory32Fixed (ReadWrite, 0, 0x00001000, BAR1)
15                 Memory32Fixed (ReadWrite, 0, 0x00200000, BAR2)
16                 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
17                 {
18                         LPE_DMA0_IRQ
19                 }
20                 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
21                 {
22                         LPE_DMA1_IRQ
23                 }
24                 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
25                 {
26                         LPE_SSP0_IRQ
27                 }
28                 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
29                 {
30                         LPE_SSP1_IRQ
31                 }
32                 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
33                 {
34                         LPE_SSP2_IRQ
35                 }
36                 Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive,,,)
37                 {
38                         LPE_IPC2HOST_IRQ
39                 }
40         })
42         Method (_CRS)
43         {
44                 /* Update BAR0 from NVS */
45                 CreateDwordField (^RBUF, ^BAR0._BAS, BAS0)
46                 BAS0 = \LPB0
48                 /* Update BAR1 from NVS */
49                 CreateDwordField (^RBUF, ^BAR1._BAS, BAS1)
50                 BAS1 = \LPB1
52                 /* Update LPE FW from NVS */
53                 CreateDwordField (^RBUF, ^BAR2._BAS, BAS2)
54                 BAS2 = \LPFW
56                 /* Append any Mainboard defined GPIOs */
57                 If (CondRefOf (^GBUF)) {
58                         ConcatenateResTemplate (^RBUF, ^GBUF, Local1)
59                         Return (Local1)
60                 }
62                 Return (^RBUF)
63         }
65         Method (_STA)
66         {
67                 If (\LPEN == 1) {
68                         Return (0xF)
69                 } Else {
70                         Return (0x0)
71                 }
72         }
74         OperationRegion (KEYS, SystemMemory, LPB1, 0x100)
75         Field (KEYS, DWordAcc, NoLock, WriteAsZeros)
76         {
77                 Offset (0x84),
78                 PSAT, 32,
79         }
81         PowerResource (PLPE, 0, 0)
82         {
83                 Method (_STA)
84                 {
85                         Return (1)
86                 }
88                 Method (_OFF)
89                 {
90                         PSAT |= 3
91                         PSAT |= 0
92                 }
94                 Method (_ON)
95                 {
96                         PSAT &= 0xfffffffc
97                         PSAT |= 0
98                 }
99         }