src/soc/intel/braswell/gfx.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include "chip.h"
   4 #include <console/console.h>
   5 #include <device/device.h>
   6 #include <device/pci.h>
   7 #include <device/pci_ids.h>
   8 #include <drivers/intel/gma/opregion.h>
   9 #include <drivers/intel/gma/i915.h>
  10 #include <reg_script.h>
  11 #include <soc/gfx.h>
  12 #include <soc/pci_devs.h>
  13 #include <soc/ramstage.h>
  14
  15 static const struct reg_script gpu_pre_vbios_script[] = {
  16         /* Make sure GFX is bus master with MMIO access */
  17         REG_PCI_OR32(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY),
  18         REG_SCRIPT_END
  19 };
  20
  21 static const struct reg_script gfx_post_vbios_script[] = {
  22         /* Set Lock bits */
  23         REG_PCI_RMW32(GGC,      0xffffffff, GGC_GGCLCK),
  24         REG_PCI_RMW32(GSM_BASE, 0xffffffff, GSM_BDSM_LOCK),
  25         REG_PCI_RMW32(GTT_BASE, 0xffffffff, GTT_BGSM_LOCK),
  26         REG_SCRIPT_END
  27 };
  28
  29 static inline void gfx_run_script(struct device *dev, const struct reg_script *ops)
  30 {
  31         reg_script_run_on_dev(dev, ops);
  32 }
  33
  34 static void gfx_pre_vbios_init(struct device *dev)
  35 {
  36         printk(BIOS_INFO, "GFX: Pre VBIOS Init\n");
  37         gfx_run_script(dev, gpu_pre_vbios_script);
  38 }
  39
  40 static void gfx_post_vbios_init(struct device *dev)
  41 {
  42         printk(BIOS_INFO, "GFX: Post VBIOS Init\n");
  43         gfx_run_script(dev, gfx_post_vbios_script);
  44 }
  45
  46 static void gfx_init(struct device *dev)
  47 {
  48         intel_gma_init_igd_opregion();
  49
  50         if (!CONFIG(RUN_FSP_GOP)) {
  51                 /* Pre VBIOS Init */
  52                 gfx_pre_vbios_init(dev);
  53
  54                 /* Run VBIOS */
  55                 pci_dev_init(dev);
  56
  57                 /* Post VBIOS Init */
  58                 gfx_post_vbios_init(dev);
  59         }
  60 }
  61
  62 static void gma_generate_ssdt(const struct device *dev)
  63 {
  64         const struct soc_intel_braswell_config *chip = dev->chip_info;
  65
  66         drivers_intel_gma_displays_ssdt_generate(&chip->gfx);
  67 }
  68
  69 static struct device_operations gfx_device_ops = {
  70         .read_resources         = pci_dev_read_resources,
  71         .set_resources          = pci_dev_set_resources,
  72         .enable_resources       = pci_dev_enable_resources,
  73         .init                   = gfx_init,
  74         .ops_pci                = &soc_pci_ops,
  75         .acpi_fill_ssdt         = gma_generate_ssdt,
  76 };
  77
  78 static const struct pci_driver gfx_driver __pci_driver = {
  79         .ops    = &gfx_device_ops,
  80         .vendor = PCI_VID_INTEL,
  81         .device = GFX_DEVID,
  82 };