mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / common / block / acpi / lpit.c
blob37ffd7252f76249c9126aa87f5e98f1e74ee17a8
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <acpi/acpi.h>
4 #include <cpu/intel/msr.h>
5 #include <soc/iomap.h>
6 #include <soc/pmc.h>
7 #include <stdint.h>
9 unsigned long acpi_fill_lpit(unsigned long current)
11 uint16_t uid = 0;
12 acpi_lpi_desc_ncst_t *pkg_counter;
13 acpi_lpi_desc_ncst_t *sys_counter;
16 * Package C10 (PC10) residency counter
18 pkg_counter = (void *)current;
19 current += acpi_create_lpi_desc_ncst((void *)current, uid++);
21 /* MWAIT LPI state entry trigger */
22 pkg_counter->entry_trigger.addrl = 0x60; /* MWAIT(6,0) / HW C10 */
23 pkg_counter->entry_trigger.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT;
24 pkg_counter->entry_trigger.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL;
25 pkg_counter->entry_trigger.space_id = ACPI_ADDRESS_SPACE_FIXED;
26 pkg_counter->entry_trigger.access_size = ACPI_ACCESS_SIZE_UNDEFINED;
28 /* PC10 residency counter */
29 pkg_counter->residency_counter.addrl = MSR_PKG_C10_RESIDENCY;
30 pkg_counter->residency_counter.bit_offset = 0;
31 pkg_counter->residency_counter.bit_width = 64;
32 pkg_counter->residency_counter.space_id = ACPI_ADDRESS_SPACE_FIXED;
33 pkg_counter->residency_counter.access_size = ACPI_ACCESS_SIZE_UNDEFINED;
34 pkg_counter->counter_frequency = ACPI_LPIT_CTR_FREQ_TSC;
36 /* Min. residency and worst-case latency (from FSP and vendor dumps) */
37 pkg_counter->min_residency = 30000; /* break-even: 30 ms */
38 pkg_counter->max_latency = 3000; /* worst-case latency: 3 ms */
41 * System (Slp_S0) residency counter
43 sys_counter = (void *)current;
44 current += acpi_create_lpi_desc_ncst((void *)current, uid++);
46 /* MWAIT LPI state entry trigger */
47 sys_counter->entry_trigger.addrl = 0x60; /* MWAIT(6,0) / HW C10 */
48 sys_counter->entry_trigger.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT;
49 sys_counter->entry_trigger.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL;
50 sys_counter->entry_trigger.space_id = ACPI_ADDRESS_SPACE_FIXED;
51 sys_counter->entry_trigger.access_size = ACPI_ACCESS_SIZE_UNDEFINED;
53 /* slp_s0 residency counter */
54 sys_counter->residency_counter.addrl = PCH_PWRM_BASE_ADDRESS + SLP_S0_RES;
55 sys_counter->residency_counter.bit_offset = 0;
56 sys_counter->residency_counter.bit_width = 32;
57 sys_counter->residency_counter.space_id = ACPI_ADDRESS_SPACE_MEMORY;
58 sys_counter->residency_counter.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
59 sys_counter->counter_frequency =
60 CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ;
62 /* Min. residency and worst-case latency (from FSP and vendor dumps) */
63 sys_counter->min_residency = 30000; /* break-even: 30 ms */
64 sys_counter->max_latency = 3000; /* worst-case latency: 3 ms */
66 return current;