mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / common / block / xdci / xdci.c
blob7ee2dbb592fdeda3e6808f5409f2d0208ebf5a0a
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/pci.h>
5 #include <device/pci_ids.h>
6 #include <intelblocks/xdci.h>
7 #include <security/vboot/vboot_common.h>
8 #include <stdbool.h>
10 __weak void soc_xdci_init(struct device *dev) { /* no-op */ }
12 bool xdci_can_enable(unsigned int xdci_devfn)
14 /* Enable xDCI controller if enabled in devicetree and allowed */
15 if (!vboot_can_enable_udc()) {
16 devfn_disable(pci_root_bus(), xdci_devfn);
17 return false;
19 return is_devfn_enabled(xdci_devfn);
22 struct device_operations usb_xdci_ops = {
23 .read_resources = pci_dev_read_resources,
24 .set_resources = pci_dev_set_resources,
25 .enable_resources = pci_dev_enable_resources,
26 .init = soc_xdci_init,
27 .ops_pci = &pci_dev_ops_pci,
30 static const unsigned short pci_device_ids[] = {
31 PCI_DID_INTEL_MTL_XDCI,
32 PCI_DID_INTEL_APL_XDCI,
33 PCI_DID_INTEL_CNL_LP_XDCI,
34 PCI_DID_INTEL_GLK_XDCI,
35 PCI_DID_INTEL_CNP_H_XDCI,
36 PCI_DID_INTEL_ICP_LP_XDCI,
37 PCI_DID_INTEL_CMP_LP_XDCI,
38 PCI_DID_INTEL_CMP_H_XDCI,
39 PCI_DID_INTEL_TGP_LP_XDCI,
40 PCI_DID_INTEL_TGP_H_XDCI,
41 PCI_DID_INTEL_MCC_XDCI,
42 PCI_DID_INTEL_JSP_XDCI,
43 PCI_DID_INTEL_ADP_P_XDCI,
44 PCI_DID_INTEL_ADP_S_XDCI,
45 PCI_DID_INTEL_ADP_M_XDCI,
46 PCI_DID_INTEL_RPP_S_XDCI,
50 static const struct pci_driver pch_usb_xdci __pci_driver = {
51 .ops = &usb_xdci_ops,
52 .vendor = PCI_VID_INTEL,
53 .devices = pci_device_ids,