mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / common / smbios.c
blob818a35e6ada4db1787e9d74f97e31788b3e55e61
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <smbios.h>
4 #include "smbios.h"
5 #include <string.h>
6 #include <commonlib/helpers.h>
7 #include <device/dram/ddr3.h>
8 #include <dimm_info_util.h>
10 #define EXTENSION_BUS_WIDTH_8BITS 8
12 /* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
13 void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
14 u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id,
15 const char *module_part_num, size_t module_part_number_size,
16 const u8 *module_serial_num, u16 data_width, u32 vdd_voltage,
17 bool ecc_support, u16 mod_id, u8 mod_type, u8 ctrlr_id,
18 u32 max_frequency)
20 dimm->mod_id = mod_id;
21 dimm->mod_type = mod_type;
22 dimm->dimm_size = dimm_capacity;
23 dimm->ddr_type = ddr_type;
24 /* keep ddr_frequency for backward compatible */
25 dimm->ddr_frequency = frequency;
26 dimm->configured_speed_mts = frequency;
27 dimm->max_speed_mts = max_frequency;
28 dimm->rank_per_dimm = rank_per_dimm;
29 dimm->channel_num = channel_id;
30 dimm->dimm_num = dimm_id;
31 dimm->ctrlr_num = ctrlr_id;
33 if (vdd_voltage > 0xFFFF) {
34 dimm->vdd_voltage = 0xFFFF;
35 } else {
36 dimm->vdd_voltage = vdd_voltage;
39 strncpy((char *)dimm->module_part_number,
40 module_part_num,
41 MIN(sizeof(dimm->module_part_number),
42 module_part_number_size));
43 if (module_serial_num)
44 memcpy(dimm->serial, module_serial_num,
45 DIMM_INFO_SERIAL_SIZE);
47 uint16_t total_width = data_width;
49 if (ecc_support)
50 total_width += EXTENSION_BUS_WIDTH_8BITS;
52 dimm->bus_width = smbios_bus_width_to_spd_width(ddr_type, total_width, data_width);