mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / denverton_ns / xhci.c
blob2760120c2beaa08ef7a6a78a3bea69a705d93348
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include <device/pci_ops.h>
9 #include <soc/pci_devs.h>
10 #include <soc/ramstage.h>
12 static void usb_xhci_init(struct device *dev)
14 /* USB XHCI configuration is handled by the FSP */
16 printk(BIOS_NOTICE, "pch: %s\n", __func__);
18 /* Set the value for PCI command register. */
19 pci_write_config16(dev, PCI_COMMAND,
20 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
23 static struct device_operations usb_xhci_ops = {
24 .read_resources = pci_dev_read_resources,
25 .set_resources = pci_dev_set_resources,
26 .enable_resources = pci_dev_enable_resources,
27 .init = usb_xhci_init,
28 .enable = pci_dev_enable_resources,
29 .ops_pci = &soc_pci_ops,
32 static const struct pci_driver pch_usb_xhci __pci_driver = {
33 .ops = &usb_xhci_ops,
34 .vendor = PCI_VID_INTEL,
35 .device = PCI_DID_INTEL_DNV_XHCI,