1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/pcr_ids.h>
8 * Clear register 0x1C20/0x4820
11 Method(SCSC, 1, Serialized)
13 PCRA (Arg0, 0x1C20, 0x0)
14 PCRA (Arg0, 0x4820, 0x0)
19 Name(_ADR, 0x001A0000)
20 Name (_DDN, "eMMC Controller")
23 OperationRegion(SCSR, PCI_Config, 0x00, 0x100)
24 Field(SCSR, WordAcc, NoLock, Preserve) {
25 Offset (0x84), /* PMECTRLSTATUS */
27 Offset (0xA2), /* PG_CONFIG */
29 PGEN, 1, /* PG_ENABLE */
33 /* Clear register 0x1C20/0x4820 */
37 Method(_PS0, 0, Serialized) {
38 Stall (50) // Sleep 50 us
40 PGEN = 0 // Disable PG
42 /* Clear register 0x1C20/0x4820 */
45 /* Set Power State to D0 */
50 Method(_PS3, 0, Serialized) {
53 /* Set Power State to D3 */
60 Name (_ADR, 0x00000008)
61 Method (_RMV, 0, NotSerialized)
71 Name (_ADR, 0x00140005)
72 Name (_DDN, "SD Controller")
74 Name (DSUU, ToUUID("f6c13ea5-65cd-461f-ab7a-29f7e8d5bd61"))
76 OperationRegion (SDPC, PCI_Config, 0x00, 0x100)
77 Field (SDPC, WordAcc, NoLock, Preserve)
79 Offset (0x84), /* PMECTRLSTATUS */
81 Offset (0xA2), /* PG_CONFIG */
83 PGEN, 1, /* PG_ENABLE */
87 * _DSM x86 Device Specific Method
88 * Arg0: UUID Unique function identifier
89 * Arg1: Integer Revision Level
90 * Arg2: Integer Function Index (0 = Return Supported Functions)
91 * Arg3: Package Parameters
96 /* Check the revision */
99 * Function Index 0 the return value is a buffer containing
100 * one bit for each function index, starting with zero.
101 * Bit 0 - Indicates whether there is support for any
102 * functions other than function 0.
103 * Bit 1 - Indicates support to clear power control register
104 * Bit 2 - Indicates support to set power control register
105 * Bit 3 - Indicates support to set 1.8V signalling
106 * Bit 4 - Indicates support to set 3.3V signalling
107 * Bit 5 - Indicates support for HS200 mode
108 * Bit 6 - Indicates support for HS400 mode
109 * Bit 9 - Indicates eMMC I/O Driver Strength
112 * For SD we have to support functions to
113 * set 1.8V signalling and 3.3V signalling [BIT4, BIT3]
116 Return (Buffer () { 0x19 })
119 * Function Index 3: Set 1.8v signalling.
120 * We put a sleep of 100ms in this method to
121 * work around a known issue with detecting
122 * UHS SD card on PCH. This is to compensate
123 * for the SD VR slowness.
127 Return(Buffer () { 0x00 })
130 * Function Index 4: Set 3.3v signalling.
131 * We put a sleep of 100ms in this method to
132 * work around a known issue with detecting
133 * UHS SD card on PCH. This is to compensate
134 * for the SD VR slowness.
138 Return(Buffer () { 0x00 })
142 Return(Buffer() { 0x0 })
147 /* Clear register 0x1C20/0x4820 */
151 Method (_PS0, 0, Serialized)
153 PGEN = 0 /* Disable PG */
155 /* Clear register 0x1C20/0x4820 */
158 /* Set Power State to D0 */
162 /* Change pad mode to Native */
163 GPMO(SD_PWR_EN_PIN, 0x1)
166 Method (_PS3, 0, Serialized)
168 PGEN = 1 /* Enable PG */
170 /* Set Power State to D3 */
174 /* Change pad mode to GPIO control */
175 GPMO(SD_PWR_EN_PIN, 0x0)
177 /* Enable Tx Buffer */
178 GTXE(SD_PWR_EN_PIN, 0x1)
180 /* Drive TX to zero */
186 Name (_ADR, 0x00000008)
187 Method (_RMV, 0, NotSerialized)
192 } /* Device (SDXC) */