mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / intel / xeon_sp / acpi / gen1 / iiostack.asl
blob0dd39a0f5464a59a6d39c8e904f790b16d9ca044
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #define MAKE_IIO_DEV(id,rt)                                             \
4         Device (PC##id)                                                 \
5         {                                                               \
6                 Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */)   \
7                 Name (_CID, EisaId ("PNP0A03") /* PCI Bus */)           \
8                 Name (_UID, 0x##id)                                     \
9                 Method (_PRT, 0, NotSerialized)                         \
10                 {                                                       \
11                         If (PICM)                                       \
12                         {                                               \
13                                 Return (\_SB_.AR##rt)                   \
14                         }                                               \
15                         Return (\_SB_.PR##rt)                           \
16                 }                                                       \
17                 Name (SUPP, 0x00)                                       \
18                 Name (CTRL, 0x00)                                       \
19                 Name (_PXM, 0x00)  /* _PXM: Device Proximity */         \
20                 Method (_OSC, 4, NotSerialized)                         \
21                 {                                                       \
22                         CreateDWordField (Arg3, 0x00, CDW1)             \
23                         If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))  \
24                         {                                                       \
25                                 If (Arg2 < 0x03)                                \
26                                 {                                               \
27                                         CDW1 |= 0x02 /* Unknown failure */      \
28                                         Return (Arg3)                           \
29                                 }                                               \
30                                 CreateDWordField (Arg3, 0x04, CDW2)             \
31                                 CreateDWordField (Arg3, 0x08, CDW3)             \
32                                 SUPP = CDW2                                     \
33                                 CTRL = CDW3                                     \
34                                 If ((SUPP & 0x16) != 0x16)              \
35                                 {                                               \
36                                         CTRL &= 0x1E                            \
37                                 }                                               \
38                                 /* Never allow SHPC (no SHPC controller in system) */ \
39                                 CTRL &= 0x1D                                    \
40                                 /* Disable Native PCIe AER handling from OS */  \
41                                 CTRL &= 0x17                                    \
42                                 If ((Arg1 != 1)) /* unknown revision */ \
43                                 {                                               \
44                                         CDW1 |= 0x08                            \
45                                 }                                               \
46                                 If ((CDW3 != CTRL)) /* capabilities bits were masked */ \
47                                 {                                               \
48                                         CDW1 |= 0x10                            \
49                                 }                                               \
50                                 CDW3 = CTRL                                     \
51                                 Return (Arg3)                                   \
52                         }                                                       \
53                         Else                                                    \
54                         {                                                       \
55                                 /* indicate unrecognized UUID */                \
56                                 CDW1 |= 0x04                                    \
57                                 DBG0 = 0xEE                                     \
58                                 Return (Arg3)                                   \
59                         }                                                       \
60                 }                                                               \
61         }
63 MAKE_IIO_DEV(00, 00)
64 MAKE_IIO_DEV(01, 10)
65 MAKE_IIO_DEV(02, 20)
66 MAKE_IIO_DEV(03, 28)
68 #if (CONFIG_MAX_SOCKET > 1)
69 MAKE_IIO_DEV(06, 40)
70 MAKE_IIO_DEV(07, 50)
71 MAKE_IIO_DEV(08, 60)
72 MAKE_IIO_DEV(09, 68)
73 #endif