src/soc/intel/xeon_sp/cpx/hob_display.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <assert.h>
   4 #include <console/console.h>
   5 #include <fsp/util.h>
   6 #include <hob_iiouds.h>
   7 #include <hob_memmap.h>
   8 #include <hob_prevbooterr.h>
   9 #include <lib.h>
  10 #include <soc/soc_util.h>
  11
  12 static const uint8_t fsp_hob_iio_uds_guid[16] = FSP_HOB_IIO_UNIVERSAL_DATA_GUID;
  13 static const uint8_t fsp_hob_memmap_guid[16] = FSP_SYSTEM_MEMORYMAP_HOB_GUID;
  14 static const uint8_t fsp_hob_prevbooterr_guid[16] = FSP_PREV_BOOT_ERR_SRC_HOB_GUID;
  15
  16 struct guid_name_map {
  17         const void *guid;
  18         const char *name;
  19 };
  20
  21 static const struct guid_name_map  guid_names[] = {
  22         { fsp_hob_iio_uds_guid, "FSP_HOB_IIO_UNIVERSAL_DATA_GUID" },
  23         { fsp_hob_memmap_guid, "FSP_SYSTEM_MEMORYMAP_HOB_GUID" },
  24         { fsp_hob_prevbooterr_guid, "FSP_PREV_BOOT_ERR_SRC_HOB_GUID" },
  25 };
  26
  27 const char *soc_get_guid_name(const uint8_t *guid)
  28 {
  29         size_t index;
  30
  31         /* Compare the GUID values in this module */
  32         for (index = 0; index < ARRAY_SIZE(guid_names); index++)
  33                 if (fsp_guid_compare(guid, guid_names[index].guid))
  34                         return guid_names[index].name;
  35
  36         return NULL;
  37 }
  38
  39 static void soc_display_memmap_hob(const struct SystemMemoryMapHob **hob_addr)
  40 {
  41         struct SystemMemoryMapHob *hob = (struct SystemMemoryMapHob *)*hob_addr;
  42
  43         printk(BIOS_DEBUG, "================== MEMORY MAP HOB DATA ==================\n");
  44         printk(BIOS_DEBUG, "hob: %p, structure size: 0x%lx\n",
  45                 hob, sizeof(*hob));
  46
  47         printk(BIOS_DEBUG, "\tlowMemBase: 0x%x, lowMemSize: 0x%x, highMemBase: 0x%x, "
  48                 "highMemSize: 0x%x\n",
  49                 hob->lowMemBase, hob->lowMemSize, hob->highMemBase, hob->highMemSize);
  50         printk(BIOS_DEBUG, "\tmemSize: 0x%x, memFreq: 0x%x\n",
  51                 hob->memSize, hob->memFreq);
  52
  53         printk(BIOS_DEBUG, "\tNumChPerMC: %d\n", hob->NumChPerMC);
  54         printk(BIOS_DEBUG, "\tSystemMemoryMapElement Entries: %d, entry size: %ld\n",
  55                 hob->numberEntries, sizeof(SYSTEM_MEMORY_MAP_ELEMENT));
  56         for (int e = 0; e < hob->numberEntries; ++e) {
  57                 const struct SystemMemoryMapElement *mem_element = &hob->Element[e];
  58                 printk(BIOS_DEBUG, "\t\tmemory_map %d BaseAddress: 0x%x, ElementSize: 0x%x, Type: 0x%x\n",
  59                         e, mem_element->BaseAddress,
  60                         mem_element->ElementSize, mem_element->Type);
  61         }
  62
  63         printk(BIOS_DEBUG, "\tBiosFisVersion: 0x%x\n", hob->BiosFisVersion);
  64         printk(BIOS_DEBUG, "\tMmiohBase: 0x%x\n", hob->MmiohBase);
  65
  66         hexdump(hob, sizeof(*hob));
  67 }
  68
  69 static void soc_display_iio_universal_data_hob(const IIO_UDS *hob)
  70 {
  71         printk(BIOS_DEBUG, "===================== IIO_UDS HOB DATA =====================\n");
  72         printk(BIOS_DEBUG, "hob: %p, structure size: 0x%lx\n",
  73                 hob, sizeof(*hob));
  74
  75         printk(BIOS_DEBUG, "\t===================== SYSTEM STATUS =====================\n");
  76         printk(BIOS_DEBUG, "\tnumCpus: 0x%x\n", hob->SystemStatus.numCpus);
  77         printk(BIOS_DEBUG, "\ttolmLimit: 0x%x\n", hob->SystemStatus.tolmLimit);
  78         printk(BIOS_DEBUG, "\ttohmLimit: 0x%x\n", hob->SystemStatus.tohmLimit);
  79
  80         printk(BIOS_DEBUG, "\t===================== PLATFORM DATA =====================\n");
  81         printk(BIOS_DEBUG, "\tPlatGlobalIoBase: 0x%x\n", hob->PlatformData.PlatGlobalIoBase);
  82         printk(BIOS_DEBUG, "\tPlatGlobalIoLimit: 0x%x\n", hob->PlatformData.PlatGlobalIoLimit);
  83         printk(BIOS_DEBUG, "\tPlatGlobalMmio32Base: 0x%x\n",
  84                 hob->PlatformData.PlatGlobalMmio32Base);
  85         printk(BIOS_DEBUG, "\tPlatGlobalMmio32Limit: 0x%x\n",
  86                 hob->PlatformData.PlatGlobalMmio32Limit);
  87         printk(BIOS_DEBUG, "\tPlatGlobalMmio64Base: 0x%llx\n",
  88                 hob->PlatformData.PlatGlobalMmio64Base);
  89         printk(BIOS_DEBUG, "\tPlatGlobalMmio64Limit: 0x%llx\n",
  90                 hob->PlatformData.PlatGlobalMmio64Limit);
  91         printk(BIOS_DEBUG, "\tMemTsegSize: 0x%x\n", hob->PlatformData.MemTsegSize);
  92         printk(BIOS_DEBUG, "\tMemIedSize: 0x%x\n", hob->PlatformData.MemIedSize);
  93         printk(BIOS_DEBUG, "\tPciExpressBase: 0x%llx\n", hob->PlatformData.PciExpressBase);
  94         printk(BIOS_DEBUG, "\tPciExpressSize: 0x%x\n", hob->PlatformData.PciExpressSize);
  95         printk(BIOS_DEBUG, "\tMemTolm: 0x%x\n", hob->PlatformData.MemTolm);
  96         printk(BIOS_DEBUG, "\tnumofIIO: 0x%x\n", hob->PlatformData.numofIIO);
  97         printk(BIOS_DEBUG, "\tMaxBusNumber: 0x%x\n", hob->PlatformData.MaxBusNumber);
  98         printk(BIOS_DEBUG, "\tIoGranularity: 0x%x\n", hob->PlatformData.IoGranularity);
  99         printk(BIOS_DEBUG, "\tMmiolGranularity: 0x%x\n", hob->PlatformData.MmiolGranularity);
 100         printk(BIOS_DEBUG, "\tMmiohGranularity: hi: 0x%x, lo:0x%x\n",
 101                 hob->PlatformData.MmiohGranularity.hi, hob->PlatformData.MmiohGranularity.lo);
 102         printk(BIOS_DEBUG, "\tPci64BitResourceAllocation: %d\n",
 103                 hob->PlatformData.Pci64BitResourceAllocation);
 104
 105         for (uint8_t s = 0; s < MAX_SOCKET; ++s) {
 106                 printk(BIOS_DEBUG, "\t============ Socket %d Info ================\n", s);
 107                 printk(BIOS_DEBUG, "\tValid: 0x%x\n",
 108                         hob->PlatformData.IIO_resource[s].Valid);
 109                 printk(BIOS_DEBUG, "\tSocketID: 0x%x\n",
 110                         hob->PlatformData.IIO_resource[s].SocketID);
 111                 printk(BIOS_DEBUG, "\tBusBase: 0x%x\n",
 112                         hob->PlatformData.IIO_resource[s].BusBase);
 113                 printk(BIOS_DEBUG, "\tBusLimit: 0x%x\n",
 114                         hob->PlatformData.IIO_resource[s].BusLimit);
 115                 printk(BIOS_DEBUG, "\tPciResourceIoBase: 0x%x\n",
 116                         hob->PlatformData.IIO_resource[s].PciResourceIoBase);
 117                 printk(BIOS_DEBUG, "\tPciResourceIoLimit: 0x%x\n",
 118                         hob->PlatformData.IIO_resource[s].PciResourceIoLimit);
 119                 printk(BIOS_DEBUG, "\tIoApicBase: 0x%x\n",
 120                         hob->PlatformData.IIO_resource[s].IoApicBase);
 121                 printk(BIOS_DEBUG, "\tIoApicLimit: 0x%x\n",
 122                         hob->PlatformData.IIO_resource[s].IoApicLimit);
 123                 printk(BIOS_DEBUG, "\tMmio32Base: 0x%x\n",
 124                         hob->PlatformData.IIO_resource[s].Mmio32Base);
 125                 printk(BIOS_DEBUG, "\tMmio32Limit: 0x%x\n",
 126                         hob->PlatformData.IIO_resource[s].Mmio32Limit);
 127                 printk(BIOS_DEBUG, "\tMmio64Base: 0x%llx\n",
 128                         hob->PlatformData.IIO_resource[s].Mmio64Base);
 129                 printk(BIOS_DEBUG, "\tMmio64Limit: 0x%llx\n",
 130                         hob->PlatformData.IIO_resource[s].Mmio64Limit);
 131
 132                 printk(BIOS_DEBUG, "\t============ Stack Info ================\n");
 133                 for (int x = 0; x < MAX_LOGIC_IIO_STACK; ++x) {
 134                         const STACK_RES *ri = &hob->PlatformData.IIO_resource[s].StackRes[x];
 135                         printk(BIOS_DEBUG, "\t\t========== Stack %d ===============\n", x);
 136                         printk(BIOS_DEBUG, "\t\tPersonality: 0x%x\n", ri->Personality);
 137                         printk(BIOS_DEBUG, "\t\tBusBase: 0x%x\n", ri->BusBase);
 138                         printk(BIOS_DEBUG, "\t\tBusLimit: 0x%x\n", ri->BusLimit);
 139                         printk(BIOS_DEBUG, "\t\tPciResourceIoBase: 0x%x\n",
 140                                 ri->PciResourceIoBase);
 141                         printk(BIOS_DEBUG, "\t\tPciResourceIoLimit: 0x%x\n",
 142                                 ri->PciResourceIoLimit);
 143                         printk(BIOS_DEBUG, "\t\tIoApicBase: 0x%x\n", ri->IoApicBase);
 144                         printk(BIOS_DEBUG, "\t\tIoApicLimit: 0x%x\n", ri->IoApicLimit);
 145                         printk(BIOS_DEBUG, "\t\tMmio32Base: 0x%x\n", ri->Mmio32Base);
 146                         printk(BIOS_DEBUG, "\t\tMmio32Limit: 0x%x\n", ri->Mmio32Limit);
 147                         printk(BIOS_DEBUG, "\t\tMmio64Base: 0x%llx\n", ri->Mmio64Base);
 148                         printk(BIOS_DEBUG, "\t\tMmio64Limit: 0x%llx\n", ri->Mmio64Limit);
 149                         printk(BIOS_DEBUG, "\t\tPciResourceMem32Base: 0x%x\n",
 150                                 ri->PciResourceMem32Base);
 151                         printk(BIOS_DEBUG, "\t\tPciResourceMem32Limit: 0x%x\n",
 152                                 ri->PciResourceMem32Limit);
 153                         printk(BIOS_DEBUG, "\t\tPciResourceMem64Base: 0x%llx\n",
 154                                 ri->PciResourceMem64Base);
 155                         printk(BIOS_DEBUG, "\t\tPciResourceMem64Limit: 0x%llx\n",
 156                                 ri->PciResourceMem64Limit);
 157                         printk(BIOS_DEBUG, "\t\tVtdBarAddress: 0x%x\n", ri->VtdBarAddress);
 158                 }
 159
 160                 printk(BIOS_DEBUG, "\t============ PcieInfo ================\n");
 161                 IIO_RESOURCE_INSTANCE iio_resource =
 162                         hob->PlatformData.IIO_resource[s];
 163                 for (int p = 0; p < NUMBER_PORTS_PER_SOCKET; ++p) {
 164                         printk(BIOS_DEBUG, "\t\tPort: %d, Device: 0x%x, Function: 0x%x\n",
 165                                 p, iio_resource.PcieInfo.PortInfo[p].Device,
 166                                 iio_resource.PcieInfo.PortInfo[p].Function);
 167                 }
 168         }
 169
 170         hexdump(hob, sizeof(*hob));
 171 }
 172
 173 /*
 174  * Display PREV_BOOT_ERR_SRC_HOB. Check various issues:
 175  * a. Length field of the HOB needs to be more than 2.
 176  * b. CPX-SP FSP only implements MC_BANK_INFO type.
 177  * c. Type field (first field of each record) needs to be of enum ERROR_ACCESS_TYPE.
 178  */
 179 static void soc_display_prevbooterr_hob(const PREV_BOOT_ERR_SRC_HOB *hob)
 180 {
 181         printk(BIOS_DEBUG, "================ PREV_BOOT_ERR_SRC HOB DATA ================\n");
 182         printk(BIOS_DEBUG, "hob: %p, Length: 0x%x\n", hob, hob->Length);
 183
 184         if (hob->Length <= 2) {
 185                 printk(BIOS_INFO, "PREV_BOOT_ERR_SRC_HOB does not have valid error record.\n");
 186                 return;
 187         }
 188
 189         MCBANK_ERR_INFO *mcbinfo;
 190         for (uint16_t len = 2; len < hob->Length; ) {
 191                 const uint8_t type = *(uint8_t *)((void *)hob + len);
 192                 switch (type) {
 193                 case McBankType:
 194                         printk(BIOS_DEBUG, "\t MCBANK ERR INFO:\n");
 195                         mcbinfo = (MCBANK_ERR_INFO *)((void *)hob + len);
 196                         printk(BIOS_DEBUG, "\t\t Segment: %d, Socket: %d, ApicId: 0x%x\n",
 197                                 mcbinfo->Segment, mcbinfo->Socket, mcbinfo->ApicId);
 198                         printk(BIOS_DEBUG, "\t\t McBankNum: 0x%x\n", mcbinfo->McBankNum);
 199                         printk(BIOS_DEBUG, "\t\t McBankStatus: 0x%llx\n",
 200                                 mcbinfo->McBankStatus);
 201                         printk(BIOS_DEBUG, "\t\t McBankAddr: 0x%llx\n", mcbinfo->McbankAddr);
 202                         printk(BIOS_DEBUG, "\t\t McBankMisc: 0x%llx\n", mcbinfo->McBankMisc);
 203                         len += sizeof(MCBANK_ERR_INFO);
 204                         break;
 205                 case PciExType:
 206                         printk(BIOS_ERR, "\t PCI EX ERR INFO:\n");
 207                         len += sizeof(PCI_EX_ERR_INFO);
 208                         break;
 209                 case CsrOtherType:
 210                         printk(BIOS_ERR, "\t CSR ERR INFO:\n");
 211                         len += sizeof(CSR_ERR_INFO);
 212                         break;
 213                 default:
 214                         printk(BIOS_ERR, "\t illegal ERROR_ACCESS_TYPE:%d\n", type);
 215                         break;
 216                 }
 217         }
 218
 219         hexdump(hob, hob->Length);
 220 }
 221
 222 void soc_display_hob(const struct hob_header *hob)
 223 {
 224         uint8_t *guid;
 225
 226         if (hob->type != HOB_TYPE_GUID_EXTENSION)
 227                 return;
 228
 229         guid = (uint8_t *)fsp_hob_header_to_resource(hob);
 230
 231         if (fsp_guid_compare(guid, fsp_hob_iio_uds_guid))
 232                 soc_display_iio_universal_data_hob((const IIO_UDS *)(guid + 16));
 233         else if (fsp_guid_compare(guid, fsp_hob_memmap_guid))
 234                 soc_display_memmap_hob((const struct SystemMemoryMapHob **)(guid + 16));
 235         else if (fsp_guid_compare(guid, fsp_hob_prevbooterr_guid))
 236                 soc_display_prevbooterr_hob((const PREV_BOOT_ERR_SRC_HOB *)(guid + 16));
 237 }