mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / mediatek / common / devapc.c
blob5873dd5b3cfb857e785d46411c4adbc7ad9edb19
1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
3 #include <soc/devapc.h>
4 #include <soc/devapc_common.h>
6 void *getreg_domain(uintptr_t base, unsigned int offset,
7 enum domain_id domain_id, unsigned int index)
9 return (void *)(base + offset + domain_id * DOMAIN_OFT + index * IDX_OFT);
12 void *getreg(uintptr_t base, unsigned int offset)
14 return getreg_domain(base, offset, 0, 0);
17 void set_module_apc(uintptr_t base, uint32_t module, enum domain_id domain_id,
18 enum devapc_perm_type perm)
20 uint32_t apc_register_index;
21 uint32_t apc_set_index;
23 apc_register_index = module / MOD_NO_IN_1_DEVAPC;
24 apc_set_index = module % MOD_NO_IN_1_DEVAPC;
26 clrsetbits32(getreg_domain(base, 0, domain_id, apc_register_index),
27 0x3 << (apc_set_index * 2),
28 perm << (apc_set_index * 2));
31 void dapc_init(void)
33 size_t i;
34 uintptr_t devapc_ao_base;
36 for (i = 0; i < devapc_init_cnt; i++) {
37 devapc_ao_base = devapc_init[i].base;
39 /* Init dapc */
40 write32(getreg(devapc_ao_base, AO_APC_CON), 0x0);
41 write32(getreg(devapc_ao_base, AO_APC_CON), 0x1);
43 /* Initialization */
44 if (devapc_init[i].init)
45 devapc_init[i].init(devapc_ao_base);
47 /* Dump setting */
48 if (CONFIG(DEVAPC_DEBUG) && devapc_init[i].dump)
49 devapc_init[i].dump(devapc_ao_base);