mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / mediatek / mt8192 / devapc.c
blob96bd2bdc04410e59e2366e11942870dba7ec3140
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/devapc.h>
5 static void *getreg(uintptr_t base, unsigned int offset)
7 return (void *)(base + offset);
10 static void infra_master_init(uintptr_t base)
12 /* Sidband */
13 SET32_BITFIELDS(getreg(base, MAS_SEC_0), SCP_SSPM_SEC, 1, CPU_EB_SEC, 1);
15 /* Domain */
16 SET32_BITFIELDS(getreg(base, MAS_DOM_0), PCIE_DOM, MAS_DOMAIN_1);
17 SET32_BITFIELDS(getreg(base, MAS_DOM_1), SCP_SSPM_DOM, MAS_DOMAIN_2,
18 CPU_EB_DOM, MAS_DOMAIN_2);
21 * Domain Remap: TINYSYS to non-EMI (3-bit to 4-bit)
22 * 1. SCP from 3 to 3
23 * 2. DSP from 4 to 4
24 * 3. others from XXX to 15
26 SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
27 FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15,
28 FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15,
29 FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15,
30 FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3,
31 FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_4,
32 FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15,
33 FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15,
34 FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15);
37 * Domain Remap: MMSYS slave domain remap (4-bit to 2-bit)
38 * 1. From domain 0 to domain 0 (no protection for all)
39 * 2. From domain 1, 2, 4 to domain 1 (forbidden for all)
40 * 3. From domain 3 to domain 3
41 * 4. others from XXX to domain 0
43 SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
44 TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0,
45 TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1,
46 TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_1,
47 TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_3,
48 TWO_BIT_DOM_REMAP_4, MAS_DOMAIN_1);
51 static void peri_master_init(uintptr_t base)
53 /* Domain */
54 SET32_BITFIELDS(getreg(base, MAS_DOM_0), SPM_DOM, MAS_DOMAIN_2);
57 * Domain Remap: CONNSYS slave domain remap (4-bit to 2-bit)
58 * 1. From domain 0 to domain 0 (no protection for all)
59 * 2. From domain 1 ~ 4 to domain 1 (forbidden for all)
60 * 3. others from XXX to domain 0
62 SET32_BITFIELDS(getreg(base, DOM_REMAP_1_0),
63 TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0,
64 TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1,
65 TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_1,
66 TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_1,
67 TWO_BIT_DOM_REMAP_4, MAS_DOMAIN_1);
70 * Domain Remap: TINYSYS slave domain remap (4-bit to 3-bit)
71 * 1. From domain 0 to domain 0 (no protection for all)
72 * 2. From domain 1 ~ 4 to domain 1 (forbidden for all)
73 * 3. others from XXX to domain 0
75 SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
76 THREE_BIT_DOM_REMAP_0, MAS_DOMAIN_0,
77 THREE_BIT_DOM_REMAP_1, MAS_DOMAIN_1,
78 THREE_BIT_DOM_REMAP_2, MAS_DOMAIN_1,
79 THREE_BIT_DOM_REMAP_3, MAS_DOMAIN_1,
80 THREE_BIT_DOM_REMAP_4, MAS_DOMAIN_1);
83 static void fmem_master_init(uintptr_t base)
86 * Domain Remap: TINYSYS to EMI (3-bit to 4-bit)
87 * 1. SCP from 3 to 3
88 * 2. DSP from 4 to 4
89 * 3. others from XXX to 15
91 SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0),
92 FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15,
93 FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15,
94 FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15,
95 FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3,
96 FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_4,
97 FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15,
98 FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15,
99 FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15);
102 static void scp_master_init(uintptr_t base)
104 write32(getreg(base, SCP_DOM), MAS_DOMAIN_3);
105 write32(getreg(base, ADSP_DOM), MAS_DOMAIN_4);
107 /* Let SCP_DOM and ADSP_DOM registers be read-only for security */
108 write32(getreg(base, ONETIME_LOCK), 0x5);
111 struct devapc_init {
112 uintptr_t base;
113 void (*init)(uintptr_t base);
114 } devapc_init[DEVAPC_AO_MAX] = {
115 { DEVAPC_INFRA_AO_BASE, infra_master_init },
116 { DEVAPC_PERI_AO_BASE, peri_master_init },
117 { DEVAPC_PERI2_AO_BASE, NULL },
118 { DEVAPC_PERI_PAR_AO_BASE, NULL },
119 { DEVAPC_FMEM_AO_BASE, fmem_master_init },
120 { SCP_CFG_BASE, scp_master_init },
123 void dapc_init(void)
125 int i;
126 uintptr_t devapc_ao_base;
127 void (*init_func)(uintptr_t base);
129 for (i = 0; i < ARRAY_SIZE(devapc_init); i++) {
130 devapc_ao_base = devapc_init[i].base;
131 init_func = devapc_init[i].init;
133 /* Init dapc */
134 write32(getreg(devapc_ao_base, AO_APC_CON), 0x0);
135 write32(getreg(devapc_ao_base, AO_APC_CON), 0x1);
137 /* Init master */
138 if (init_func)
139 init_func(devapc_ao_base);