mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / mediatek / mt8192 / mtcmos.c
blob5a3b1fb189f93d6c941e409025e453eb4141d393
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <soc/infracfg.h>
5 #include <soc/mtcmos.h>
7 enum {
8 DISP_PROT_STEP1_0_MASK = 0x05015405,
9 DISP_PROT_STEP1_1_MASK = 0x00001100,
10 DISP_PROT_STEP2_0_MASK = 0x00800040,
11 DISP_PROT_STEP2_1_MASK = 0x0a02800a,
12 DISP_PROT_STEP2_2_MASK = 0x00002200,
14 AUDIO_PROT_STEP1_0_MASK = 0x00000010,
17 void mtcmos_protect_display_bus(void)
19 write32(&mt8192_infracfg->infra_topaxi_protecten_clr,
20 DISP_PROT_STEP2_0_MASK);
21 write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr,
22 DISP_PROT_STEP2_1_MASK);
23 write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr_2,
24 DISP_PROT_STEP2_2_MASK);
25 write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr,
26 DISP_PROT_STEP1_0_MASK);
27 write32(&mt8192_infracfg->infra_topaxi_protecten_mm_clr_2,
28 DISP_PROT_STEP1_1_MASK);
31 void mtcmos_protect_audio_bus(void)
33 write32(&mt8192_infracfg->infra_topaxi_protecten_clr_2,
34 AUDIO_PROT_STEP1_0_MASK);