mb/system76/cml-u/dt: Make use of chipset devicetree
[coreboot.git] / src / soc / mediatek / mt8192 / spi.c
blob42e5b4aaa92b55f006cfe5cd0fac389ef3f78b98
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <assert.h>
5 #include <gpio.h>
6 #include <soc/addressmap.h>
7 #include <soc/flash_controller_common.h>
8 #include <soc/spi.h>
10 struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = {
12 .regs = (void *)SPI0_BASE,
13 .cs_gpio = GPIO(SPI0_CSB),
16 .regs = (void *)SPI1_BASE,
17 .cs_gpio = GPIO(SPI1_CSB),
20 .regs = (void *)SPI2_BASE,
21 .cs_gpio = GPIO(SCP_SPI2_CSB),
24 .regs = (void *)SPI3_BASE,
25 .cs_gpio = GPIO(CAM_RST1),
28 .regs = (void *)SPI4_BASE,
29 .cs_gpio = GPIO(EINT5),
32 .regs = (void *)SPI5_BASE,
33 .cs_gpio = GPIO(SPI5_CSB),
36 .regs = (void *)SPI6_BASE,
37 .cs_gpio = GPIO(EINT1),
40 .regs = (void *)SPI7_BASE,
41 .cs_gpio = GPIO(SDA0),
45 struct pad_func {
46 u8 pin_id;
47 u8 func;
50 #define PAD_FUNC(name, func) {PAD_##name##_ID, PAD_##name##_FUNC_##func}
51 #define PAD_FUNC_GPIO(name) {PAD_##name##_ID, 0}
53 static const struct pad_func pad0_funcs[SPI_BUS_NUMBER][4] = {
55 PAD_FUNC(SPI0_MI, SPI0_A_MI),
56 PAD_FUNC_GPIO(SPI0_CSB),
57 PAD_FUNC(SPI0_MO, SPI0_A_MO),
58 PAD_FUNC(SPI0_CLK, SPI0_A_CLK),
61 PAD_FUNC(SPI1_MI, SPI1_A_MI),
62 PAD_FUNC_GPIO(SPI1_CSB),
63 PAD_FUNC(SPI1_MO, SPI1_A_MO),
64 PAD_FUNC(SPI1_CLK, SPI1_A_CLK),
67 PAD_FUNC(SCP_SPI2_MI, SPI2_MI),
68 PAD_FUNC_GPIO(SCP_SPI2_CSB),
69 PAD_FUNC(SCP_SPI2_MO, SPI2_MO),
70 PAD_FUNC(SCP_SPI2_CK, SPI2_CLK),
73 PAD_FUNC(CAM_RST2, SPI3_MI),
74 PAD_FUNC_GPIO(CAM_RST1),
75 PAD_FUNC(CAM_PDN0, SPI3_MO),
76 PAD_FUNC(CAM_RST0, SPI3_CLK),
79 PAD_FUNC(EINT6, SPI4_A_MI),
80 PAD_FUNC_GPIO(EINT5),
81 PAD_FUNC(EINT7, SPI4_A_MO),
82 PAD_FUNC(EINT4, SPI4_A_CLK),
85 PAD_FUNC(SPI5_MI, SPI5_A_MI),
86 PAD_FUNC_GPIO(SPI5_CSB),
87 PAD_FUNC(SPI5_MO, SPI5_A_MO),
88 PAD_FUNC(SPI5_CLK, SPI5_A_CLK),
91 PAD_FUNC(EINT2, SPI6_MI),
92 PAD_FUNC_GPIO(EINT1),
93 PAD_FUNC(EINT3, SPI6_MO),
94 PAD_FUNC(EINT0, SPI6_CLK),
97 PAD_FUNC(EINT16, SPI7_A_MI),
98 PAD_FUNC_GPIO(SDA0),
99 PAD_FUNC(EINT17, SPI7_A_MO),
100 PAD_FUNC(SCL0, SPI7_A_CLK),
104 void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
106 assert(bus < SPI_BUS_NUMBER);
107 assert(pad_select == SPI_PAD0_MASK);
108 const struct pad_func *ptr = NULL;
110 ptr = pad0_funcs[bus];
111 for (int i = 0; i < 4; i++)
112 gpio_set_mode((gpio_t){.id = ptr[i].pin_id}, ptr[i].func);
115 static const struct spi_ctrlr spi_flash_ctrlr = {
116 .max_xfer_size = 65535,
117 .flash_probe = mtk_spi_flash_probe,
120 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
122 .ctrlr = &spi_ctrlr,
123 .bus_start = 0,
124 .bus_end = SPI_BUS_NUMBER - 1,
127 .ctrlr = &spi_flash_ctrlr,
128 .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
129 .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS,
133 const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);