src/soc/qualcomm/ipq806x/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ifeq ($(CONFIG_SOC_QC_IPQ806X),y)
   4
   5 bootblock-y += clock.c
   6 bootblock-y += gpio.c
   7 bootblock-$(CONFIG_SPI_FLASH) += spi.c
   8 bootblock-y += timer.c
   9 bootblock-y += uart.c
  10
  11 verstage-y += clock.c
  12 verstage-y += gpio.c
  13 verstage-y += gsbi.c
  14 verstage-y += i2c.c
  15 verstage-y += qup.c
  16 verstage-y += spi.c
  17 verstage-y += timer.c
  18 verstage-y += uart.c
  19
  20 romstage-y += clock.c
  21 romstage-y += blobs_init.c
  22 romstage-y += gpio.c
  23 romstage-$(CONFIG_SPI_FLASH) += spi.c
  24 romstage-y += timer.c
  25 romstage-y += uart.c
  26 romstage-y += cbmem.c
  27 romstage-y += i2c.c
  28 romstage-y += gsbi.c
  29 romstage-y += qup.c
  30
  31 ramstage-y += blobs_init.c
  32 ramstage-y += clock.c
  33 ramstage-y += gpio.c
  34 ramstage-y += lcc.c
  35 ramstage-y += soc.c
  36 ramstage-$(CONFIG_SPI_FLASH) += spi.c
  37 ramstage-y += timer.c
  38 ramstage-y += uart.c  # Want the UART always ready for the kernels' earlyprintk
  39 ramstage-y += usb.c
  40 ramstage-y += tz_wrapper.S
  41 ramstage-y += gsbi.c
  42 ramstage-y += i2c.c
  43 ramstage-y += qup.c
  44 ramstage-y += spi.c
  45
  46 ifeq ($(CONFIG_USE_BLOBS),y)
  47
  48 # Add MBN header to allow SBL3 to start coreboot bootblock
  49 $(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw.bin
  50         @printf "    ADD MBN    $(subst $(obj)/,,$(@))\n"
  51         ./util/qualcomm/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp
  52         @mv $@.tmp $@
  53
  54 # Create a complete bootblock which will start up the system
  55 $(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_BLOB)) \
  56                            $(objcbfs)/bootblock.mbn
  57         @printf "    MBNCAT     $(subst $(obj)/,,$(@))\n"
  58         @util/qualcomm/mbncat.py -o $@.tmp $^
  59         @mv $@.tmp $@
  60
  61 endif
  62
  63 CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include
  64
  65 # List of binary blobs coreboot needs in CBFS to be able to boot up this SOC
  66 mbn-files := cdt.mbn  ddr.mbn  rpm.mbn tz.mbn
  67
  68 # Location of the binary blobs
  69 mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq806x
  70
  71 # Create make variables to aid cbfs-files-handler in processing the blobs (add
  72 # them all as raw binaries at the root level).
  73 $(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\
  74           $(eval $(f)-file := $(mbn-root)/$(f))\
  75           $(eval $(f)-type := raw))
  76
  77 endif