1 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <arch/header.ld>
6 /* SYSTEM_IMEM : 0x14680000 - 0x146AB000 */
7 #define SSRAM_START(addr) REGION_START(ssram, addr)
8 #define SSRAM_END(addr) REGION_END(ssram, addr)
10 /* BOOT_IMEM : 0x14800000 - 0x14980000 */
11 #define BSRAM_START(addr) REGION_START(bsram, addr)
12 #define BSRAM_END(addr) REGION_END(bsram, addr)
14 /* AOP : 0x0B000000 - 0x0B100000 */
15 #define AOPSRAM_START(addr) REGION_START(aopsram, addr)
16 #define AOPSRAM_END(addr) REGION_END(aopsram, addr)
20 REGION(shrm, 0x09060000, 64K , 4K)
22 AOPSRAM_START(0x0B000000)
23 REGION(aop_code_ram, 0x0B000000, 0x80000, 4096)
24 REGION(aop_data_ram, 0x0B0E0000, 0x20000, 4096)
25 AOPSRAM_END(0x0B100000)
27 SSRAM_START(0x14680000)
28 OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 104K)
29 REGION(qcsdi, 0x1469A000, 44K, 4K)
30 REGION(modem_id, 0x146A5D00, 4, 4)
33 BSRAM_START(0x14800000)
34 REGION(pbl_timestamps, 0x14800000, 84K, 4K)
35 WATCHDOG_TOMBSTONE(0x14818FFC, 4)
36 BOOTBLOCK(0x14819000, 44K)
37 PRERAM_CBFS_CACHE(0x14824000, 103K)
38 TIMESTAMP(0x1483DC00, 1K)
40 STACK(0x1484C000, 16K)
41 VBOOT2_WORK(0x14850000, 12K)
42 DMA_COHERENT(0x14853000, 8K)
43 REGION(qclib_serial_log, 0x14857000, 4K, 4K)
44 CBFS_MCACHE(0x14858000,16K)
45 REGION(ddr_information, 0x1485C000, 1K, 1K)
46 FMAP_CACHE(0x1485C400, 2K)
47 REGION(dcb, 0x1485E000, 32K, 4K)
48 REGION(pmic, 0x14866000, 96K, 4K)
49 REGION(ddr_training, 0x1487E000, 32K, 4K)
50 REGION(qclib, 0x14886000, 800K, 4K)
51 PRERAM_CBMEM_CONSOLE(0x14950000, 32K)
54 DRAM_START(0x80000000)
55 /* Various hardware/software subsystems make use of this area */
56 REGION(dram_aop, 0x80800000, 0x080000, 0x1000)
57 REGION(dram_soc, 0x80900000, 0x200000, 0x1000)
58 REGION(dram_cpucp,0x80B00000, 0x100000, 0x1000)
59 REGION(dram_wlan, 0x80C00000, 0xC00000, 0x1000)
60 REGION(dram_modem, 0x8B800000, 0xF600000, 0x1000)
61 REGION(dram_wpss, 0x9AE00000, 0x1900000, 0x1000)
62 POSTRAM_CBFS_CACHE(0x9F800000, 16M)
63 RAMSTAGE(0xA0800000, 16M)