1 chip soc
/intel
/jasperlake
3 # Intel Common SoC Config
4 #
+-------------------+---------------------------+
6 #
+-------------------+---------------------------+
7 #| GSPI0 | cr50 TPM. Early init is |
8 #| | required
to set up a BAR |
9 #| |
for TPM communication |
10 #| | before memory is up |
12 #
+-------------------+---------------------------+
13 register
"common_soc_config" = "{
20 .speed = I2C_SPEED_FAST,
28 # Enable Root Port
3 (index
2) for LAN
29 # External PCIe port
7 is mapped
to PCIe Root Port
3
30 register
"PcieRpEnable[2]" = "1"
31 register
"PcieClkSrcUsage[4]" = "2"
33 # Enable Root Port
7 (index
6) for WLAN
34 # External PCIe port
3 is mapped
to PCIe Root Port
7
35 register
"PcieRpEnable[6]" = "1"
36 register
"PcieClkSrcUsage[3]" = "6"
38 # Disable PCIe Root Port
8
39 register
"PcieRpEnable[7]" = "0"
41 # Audio related configurations
42 register
"PchHdaAudioLinkDmicEnable[0]" = "0"
43 register
"PchHdaAudioLinkDmicEnable[1]" = "0"
46 register
"sdcard_cd_gpio" = "0"
47 register
"SdCardPowerEnableActiveHigh" = "0"
49 # Disable eDP on port A
50 register
"DdiPortAConfig" = "0"
52 # Enable HPD
and DDC
for DDI port A
53 register
"DdiPortAHpd" = "1"
54 register
"DdiPortADdc" = "1"
56 # USB Port Configuration
57 register
"usb2_ports[0]" = "{
60 .tx_bias = USB2_BIAS_0MV,
61 .tx_emp_enable = USB2_PRE_EMP_ON,
62 .pre_emp_bias = USB2_BIAS_11P25MV,
63 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
65 register
"usb2_ports[1]" = "{
68 .tx_bias = USB2_BIAS_0MV,
69 .tx_emp_enable = USB2_PRE_EMP_ON,
70 .pre_emp_bias = USB2_BIAS_11P25MV,
71 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
73 register
"usb2_ports[2]" = "{
76 .tx_bias = USB2_BIAS_0MV,
77 .tx_emp_enable = USB2_PRE_EMP_ON,
78 .pre_emp_bias = USB2_BIAS_11P25MV,
79 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
81 register
"usb2_ports[3]" = "{
84 .tx_bias = USB2_BIAS_0MV,
85 .tx_emp_enable = USB2_PRE_EMP_ON,
86 .pre_emp_bias = USB2_BIAS_11P25MV,
87 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
89 register
"usb2_ports[4]" = "{
92 .tx_bias = USB2_BIAS_0MV,
93 .tx_emp_enable = USB2_PRE_EMP_ON,
94 .pre_emp_bias = USB2_BIAS_11P25MV,
95 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
97 register
"usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # PL2303
99 register
"usb3_ports[1]" = "USB3_PORT_EMPTY" # No USB3
/2 Type-C Port C1
100 register
"usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3
/1 Type-A Port A2
101 register
"usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3
/1 Type-A Port A3
105 chip drivers
/intel
/dptf
107 register
"policies.passive" = "{
108 [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
109 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
110 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 15000),
111 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 55, 15000)
115 register
"policies.critical" = "{
116 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
117 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
118 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),
119 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN)
122 register
"controls.power_limits" = "{
126 .time_window_min = 1 * MSECS_PER_SEC,
127 .time_window_max = 1 * MSECS_PER_SEC,
133 .time_window_min = 1 * MSECS_PER_SEC,
134 .time_window_max = 1 * MSECS_PER_SEC,
139 register
"options.tsr[0].desc" = ""Memory
""
140 register
"options.tsr[1].desc" = ""Power
""
141 register
"options.tsr[2].desc" = ""Chassis
""
143 ## Charger Performance
Control (Control, mA
)
144 register
"controls.charger_perf" = "{
151 device generic
0 on
end
153 end # SA Thermal device
155 chip drivers
/usb
/acpi
156 # TODO
(b
/264960828) verify PLD values
158 chip drivers
/usb
/acpi
159 register
"desc" = ""USB2
Type-C Port C0
""
160 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
161 register
"group" = "ACPI_PLD_GROUP(1, 1)"
162 device usb
2.0 on
end
164 chip drivers
/usb
/acpi
165 register
"desc" = ""USB2
Type-A Port A0
""
166 register
"type" = "UPC_TYPE_A"
167 register
"group" = "ACPI_PLD_GROUP(1, 2)"
168 device usb
2.1 on
end
170 chip drivers
/usb
/acpi
171 register
"desc" = ""USB2
Type-A Port A1
""
172 register
"type" = "UPC_TYPE_A"
173 register
"group" = "ACPI_PLD_GROUP(1, 3)"
174 device usb
2.2 on
end
176 chip drivers
/usb
/acpi
177 register
"desc" = ""USB2
Type-A Port A2
""
178 register
"type" = "UPC_TYPE_A"
179 register
"group" = "ACPI_PLD_GROUP(1, 4)"
180 device usb
2.3 on
end
182 chip drivers
/usb
/acpi
183 register
"desc" = ""USB2
Type-A Port A3
""
184 register
"type" = "UPC_TYPE_A"
185 register
"group" = "ACPI_PLD_GROUP(1, 5)"
186 device usb
2.4 on
end
188 chip drivers
/usb
/acpi
189 register
"desc" = ""USB3
Type-C Port C0
""
190 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
191 register
"group" = "ACPI_PLD_GROUP(1, 1)"
192 device usb
3.0 on
end
194 chip drivers
/usb
/acpi
195 device usb
3.1 off
end
197 chip drivers
/usb
/acpi
198 register
"desc" = ""USB3
Type-A Port A0
""
199 register
"type" = "UPC_TYPE_USB3_A"
200 register
"group" = "ACPI_PLD_GROUP(1, 2)"
201 device usb
3.2 on
end
203 chip drivers
/usb
/acpi
204 register
"desc" = ""USB3
Type-A Port A1
""
205 register
"type" = "UPC_TYPE_USB3_A"
206 register
"group" = "ACPI_PLD_GROUP(1, 3)"
207 device usb
3.3 on
end
209 chip drivers
/usb
/acpi
210 register
"desc" = ""USB3
Type-A Port A2
""
211 register
"type" = "UPC_TYPE_USB3_A"
212 register
"group" = "ACPI_PLD_GROUP(1, 4)"
213 device usb
3.4 on
end
215 chip drivers
/usb
/acpi
216 register
"desc" = ""USB3
Type-A Port A3
""
217 register
"type" = "UPC_TYPE_USB3_A"
218 register
"group" = "ACPI_PLD_GROUP(1, 5)"
219 device usb
3.5 on
end
224 device pci
15.0 off
end # I2C
0
225 device pci
15.1 off
end # I2C
1
226 device pci
15.2 off
end # I2C
2
227 device pci
15.3 off
end # I2C
3
229 chip drivers
/i2c
/generic
230 register
"hid" = ""RTL5682
""
231 register
"name" = ""RT58
""
232 register
"desc" = ""Realtek RT5682
""
233 register
"irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
234 register
"property_count" = "1"
235 register
"property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
236 register
"property_list[0].name" = ""realtek
,jd
-src
""
237 register
"property_list[0].integer" = "1"
243 register
"customized_leds" = "0x05af"
244 register
"wake" = "GPE0_DW0_03" # GPP_B3
245 register
"stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
246 register
"device_index" = "0"
247 device pci
00.0 on
end
249 end # PCI Express Root Port
3 - RTL8111H LAN
251 chip drivers
/wifi
/generic
252 register
"wake" = "GPE0_DW2_03"
253 device pci
00.0 on
end
255 end # PCI Express Root Port
7 - WLAN
256 device pci
1c
.7 off
end # PCI Express Root Port
8
257 device pci
1f
.3 on
end # Intel HDA