util/mainboard/google/waddledee/template/overridetree.cb

   1 chip soc/intel/jasperlake
   2
   3         # Intel Common SoC Config
   4         #+-------------------+---------------------------+
   5         #| Field             |  Value                    |
   6         #+-------------------+---------------------------+
   7         #| GSPI0             | cr50 TPM. Early init is   |
   8         #|                   | required to set up a BAR  |
   9         #|                   | for TPM communication     |
  10         #|                   | before memory is up       |
  11         #| I2C0              | Trackpad                  |
  12         #| I2C1              | Digitizer                 |
  13         #| I2C2              | Touchscreen               |
  14         #| I2C3              | Camera                    |
  15         #| I2C4              | Audio                     |
  16         #+-------------------+---------------------------+
  17         register "common_soc_config" = "{
  18                 .gspi[0] = {
  19                         .speed_mhz = 1,
  20                         .early_init = 1,
  21                 },
  22                 .i2c[0] = {
  23                         .speed = I2C_SPEED_FAST,
  24                 },
  25                 .i2c[1] = {
  26                         .speed = I2C_SPEED_FAST,
  27                 },
  28                 .i2c[2] = {
  29                         .speed = I2C_SPEED_FAST,
  30                 },
  31                 .i2c[3] = {
  32                         .speed = I2C_SPEED_FAST,
  33                 },
  34                 .i2c[4] = {
  35                         .speed = I2C_SPEED_FAST,
  36                 },
  37         }"
  38
  39         device domain 0 on
  40                 device pci 15.0 on end
  41         end
  42 end