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cfl/cml/whl mainboards: Drop superfluous cpu_cluster device
[coreboot.git] / src / mainboard / purism / librem_l1um_v2 / devicetree.cb
blob80c497b81c7a15116107019c9b4c6b1deb652f80
1 chip soc/intel/cannonlake
2
3 register "SaGv" = "SaGv_FixedHigh"
4
5 register "PcieClkSrcClkReq[0]" = "PCIE_CLK_NOTUSED"
6 register "PcieClkSrcClkReq[1]" = "PCIE_CLK_NOTUSED"
7 register "PcieClkSrcClkReq[2]" = "PCIE_CLK_NOTUSED"
8 register "PcieClkSrcClkReq[3]" = "PCIE_CLK_NOTUSED"
9 register "PcieClkSrcClkReq[4]" = "PCIE_CLK_NOTUSED"
10 register "PcieClkSrcClkReq[5]" = "PCIE_CLK_NOTUSED"
11 register "PcieClkSrcClkReq[6]" = "PCIE_CLK_NOTUSED"
12 register "PcieClkSrcClkReq[7]" = "PCIE_CLK_NOTUSED"
13 register "PcieClkSrcClkReq[8]" = "PCIE_CLK_NOTUSED"
14 register "PcieClkSrcClkReq[9]" = "PCIE_CLK_NOTUSED"
15 register "PcieClkSrcClkReq[10]" = "PCIE_CLK_NOTUSED"
16 register "PcieClkSrcClkReq[11]" = "PCIE_CLK_NOTUSED"
17 register "PcieClkSrcClkReq[12]" = "PCIE_CLK_NOTUSED"
18 register "PcieClkSrcClkReq[13]" = "PCIE_CLK_NOTUSED"
19 register "PcieClkSrcClkReq[14]" = "PCIE_CLK_NOTUSED"
20 register "PcieClkSrcClkReq[15]" = "PCIE_CLK_NOTUSED"
21
22 register "s0ix_enable" = "0"
23
24 register "eist_enable" = "1"
25
26 register "SerialIoDevMode" = "{
27 [PchSerialIoIndexI2C0] = PchSerialIoDisabled,
28 [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
29 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
30 [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
31 [PchSerialIoIndexSPI0] = PchSerialIoDisabled,
32 [PchSerialIoIndexSPI1] = PchSerialIoDisabled,
33 [PchSerialIoIndexUART0] = PchSerialIoDisabled,
34 [PchSerialIoIndexUART1] = PchSerialIoDisabled,
35 [PchSerialIoIndexUART2] = PchSerialIoDisabled,
36 }"
37
38 register "DisableHeciRetry" = "1"
39
40 device domain 0 on
41 device ref system_agent on end
42 device ref peg0 on # x16 or x8
43 register "PcieClkSrcUsage[3]" = "0x40"
44 smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "PCIE6" "SlotDataBusWidth16X"
45 end
46 device ref peg1 on # x8
47 register "PcieClkSrcUsage[4]" = "0x41"
48 smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthOther" "PCIE4" "SlotDataBusWidth8X"
49 end
50 device ref igpu on end
51 device ref dptf off end
52 device ref gna on end
53 device ref thermal on end
54 device ref xhci on
55 register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.1 front left
56 register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.1 front right
57 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB_1_2 header port A
58 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB_1_2 header port B
59 register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.1 rear top-right
60 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.1 rear bottom-right
61 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # BMC port A
62 register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.1 rear bottom-left
63 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # BMC port B (seems to be unused)
64 register "usb2_ports[10]" = "USB2_PORT_MID(OC_SKIP)" # USB 3.1 rear top-left
65
66 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.1 rear bottom-right
67 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.1 rear top-right
68 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.1 rear bottom-left
69 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.1 rear top-left
70 register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.1 front left
71 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB 3.1 front right
72
73 chip drivers/usb/acpi
74 device usb 0.0 on
75 chip drivers/usb/acpi
76 register "desc" = ""USB 2.0 Type-A Front Left""
77 register "type" = "UPC_TYPE_A"
78 register "group" = "ACPI_PLD_GROUP(0, 0)"
79 device usb 2.0 on end
80 end
81 chip drivers/usb/acpi
82 register "desc" = ""USB 2.0 Type-A Front Right""
83 register "type" = "UPC_TYPE_A"
84 register "group" = "ACPI_PLD_GROUP(0, 1)"
85 device usb 2.1 on end
86 end
87 chip drivers/usb/acpi
88 register "desc" = ""USB 2.0 USB_1_2 Header Port A""
89 register "type" = "UPC_TYPE_INTERNAL"
90 register "group" = "ACPI_PLD_GROUP(1, 0)"
91 device usb 2.2 on end
92 end
93 chip drivers/usb/acpi
94 register "desc" = ""USB 2.0 USB_1_2 Header Port B""
95 register "type" = "UPC_TYPE_INTERNAL"
96 register "group" = "ACPI_PLD_GROUP(1, 1)"
97 device usb 2.3 on end
98 end
99 chip drivers/usb/acpi
100 register "desc" = ""USB 2.0 Type-A Rear Right Upper""
101 register "type" = "UPC_TYPE_A"
102 register "group" = "ACPI_PLD_GROUP(2, 0)"
103 device usb 2.4 on end
104 end
105 chip drivers/usb/acpi
106 device usb 2.5 off end
107 end
108 chip drivers/usb/acpi
109 register "desc" = ""USB 2.0 Type-A Rear Right Lower""
110 register "type" = "UPC_TYPE_A"
111 register "group" = "ACPI_PLD_GROUP(2, 1)"
112 device usb 2.6 on end
113 end
114 chip drivers/usb/acpi
115 register "desc" = ""USB 2.0 BMC Port A""
116 register "type" = "UPC_TYPE_INTERNAL"
117 register "group" = "ACPI_PLD_GROUP(3, 0)"
118 device usb 2.7 on end
119 end
120 chip drivers/usb/acpi
121 register "desc" = ""USB 2.0 Type-A Rear Left Lower""
122 register "type" = "UPC_TYPE_A"
123 register "group" = "ACPI_PLD_GROUP(2, 2)"
124 device usb 2.8 on end
125 end
126 chip drivers/usb/acpi
127 register "desc" = ""USB 2.0 BMC Port B""
128 register "type" = "UPC_TYPE_INTERNAL"
129 register "group" = "ACPI_PLD_GROUP(3, 1)"
130 device usb 2.9 on end
131 end
132 chip drivers/usb/acpi
133 register "desc" = ""USB 2.0 Type-A Rear Left Upper""
134 register "type" = "UPC_TYPE_A"
135 register "group" = "ACPI_PLD_GROUP(2, 3)"
136 device usb 2.10 on end
137 end
138 chip drivers/usb/acpi
139 register "desc" = ""USB 3.1 Type-A Rear Right Lower""
140 register "type" = "UPC_TYPE_USB3_A"
141 register "group" = "ACPI_PLD_GROUP(2, 1)"
142 device usb 3.0 on end
143 end
144 chip drivers/usb/acpi
145 register "desc" = ""USB 3.1 Type-A Rear Right Upper""
146 register "type" = "UPC_TYPE_USB3_A"
147 register "group" = "ACPI_PLD_GROUP(2, 0)"
148 device usb 3.1 on end
149 end
150 chip drivers/usb/acpi
151 register "desc" = ""USB 3.1 Type-A Rear Left Lower""
152 register "type" = "UPC_TYPE_USB3_A"
153 register "group" = "ACPI_PLD_GROUP(2, 2)"
154 device usb 3.2 on end
155 end
156 chip drivers/usb/acpi
157 register "desc" = ""USB 3.1 Type-A Rear Left Upper""
158 register "type" = "UPC_TYPE_USB3_A"
159 register "group" = "ACPI_PLD_GROUP(2, 3)"
160 device usb 3.3 on end
161 end
162 chip drivers/usb/acpi
163 register "desc" = ""USB 3.1 Type-A Front Left""
164 register "type" = "UPC_TYPE_USB3_A"
165 register "group" = "ACPI_PLD_GROUP(0, 0)"
166 device usb 3.4 on end
167 end
168 chip drivers/usb/acpi
169 register "desc" = ""USB 3.1 Type-A Front Right""
170 register "type" = "UPC_TYPE_USB3_A"
171 register "group" = "ACPI_PLD_GROUP(0, 1)"
172 device usb 3.5 on end
173 end
174 end
175 end
176 end
177 device ref xdci off end
178 device ref shared_sram on end
179 device ref cnvi_wifi off end
180 device ref sdxc off end
181 device ref i2c0 off end
182 device ref i2c1 off end
183 device ref i2c2 off end
184 device ref i2c3 off end
185 device ref heci1 off end
186 device ref heci2 off end
187 device ref csme_ider off end
188 device ref csme_ktr off end
189 device ref heci3 off end
190 device ref sata on
191 register "satapwroptimize" = "1"
192
193 register "SataPortsEnable[0]" = "1"
194 register "SataPortsEnable[1]" = "1"
195 register "SataPortsEnable[2]" = "1"
196 register "SataPortsEnable[3]" = "1"
197 register "SataPortsEnable[4]" = "1"
198 register "SataPortsEnable[5]" = "1"
199 register "SataPortsEnable[6]" = "1"
200 register "SataPortsEnable[7]" = "1"
201
202 register "SataPortsHotPlug[0]" = "1"
203 register "SataPortsHotPlug[1]" = "1"
204 register "SataPortsHotPlug[2]" = "1"
205 register "SataPortsHotPlug[3]" = "1"
206 register "SataPortsHotPlug[4]" = "1"
207 register "SataPortsHotPlug[5]" = "1"
208 register "SataPortsHotPlug[6]" = "1"
209 register "SataPortsHotPlug[7]" = "1"
210 end
211 device ref pcie_rp21 on
212 register "PcieRpSlotImplemented[20]" = "1"
213 register "PcieRpEnable[20]" = "1"
214 register "PcieRpLtrEnable[20]" = "1"
215 register "PcieClkSrcUsage[10]" = "20"
216 smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthOther" "PCIE5" "SlotDataBusWidth4X"
217 end
218 device ref pcie_rp1 on
219 register "PcieRpSlotImplemented[0]" = "1"
220 register "PcieRpEnable[0]" = "1"
221 register "PcieRpLtrEnable[0]" = "1"
222 register "PcieClkSrcUsage[1]" = "0x80"
223 smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M2_1" "SlotDataBusWidth4X"
224 end
225 device ref pcie_rp9 on # GbE #1
226 register "PcieRpEnable[8]" = "1"
227 register "PcieRpLtrEnable[8]" = "1"
228 register "PcieClkSrcUsage[14]" = "8"
229 # Type indexes are needed for systemd to use "onboard" names by default
230 # (eno0, eno1). Otherwise it uses "slot" names that can change if any
231 # of the preceding PCIe slots are populated/unpopulated. Numbering 1/2
232 # (rather than 0/1) is consistent with the mainboard manual and vendor
233 # firmware.
234 device pci 00.0 on
235 smbios_dev_info 1
236 end
237 end
238 device ref pcie_rp10 on # BMC video
239 register "PcieRpEnable[9]" = "1"
240 register "PcieRpLtrEnable[9]" = "1"
241 register "PcieClkSrcUsage[8]" = "9"
242 end
243 device ref pcie_rp11 on # GbE #2
244 register "PcieRpEnable[10]" = "1"
245 register "PcieRpLtrEnable[10]" = "1"
246 register "PcieClkSrcUsage[11]" = "10"
247 device pci 00.0 on
248 smbios_dev_info 2
249 end
250 end
251 device ref uart0 off end
252 device ref uart1 off end
253 device ref gspi0 off end
254 device ref gspi1 off end
255 device ref lpc_espi on
256 # This board has a lot of SuperIO LDNs with I/O BARs, the LPC generic
257 # I/O ranges must be configured manually.
258 register "gen1_dec" = "0x000c0ca1" # IPMI: ca0-caf
259 register "gen2_dec" = "0x007c0a01" # ASpeed SuperIO SWC and mailbox: a00-a7f
260 register "gen3_dec" = "0x00040291" # Nuvoton SuperIO HW monitor: 290-297
261
262 # AST2500 Super IO UART1 requires continuous mode
263 register "serirq_mode" = "SERIRQ_CONTINUOUS"
264
265 chip drivers/ipmi # BMC KCS
266 device pnp ca2.0 on end
267 register "bmc_i2c_address" = "0x10"
268 end
269 # Nuvoton SuperIO
270 chip superio/common
271 # This board has two SuperIOs. The BMC's SuperIO is SIO0
272 # since it is used for most normal SuperIO functionality.
273 register "acpi_name" = ""SIO1""
274 device pnp 2e.0 on
275 chip superio/nuvoton/nct6791d
276 device pnp 2e.1 off end # Parallel port
277 device pnp 2e.2 off end # UART A
278 device pnp 2e.3 off end # UART B, IR
279 device pnp 2e.5 off end # Keyboard Controller
280 device pnp 2e.6 off end # Consumer IR
281 device pnp 2e.7 off end # GPIO 6
282 device pnp 2e.107 off end # GPIO 7
283 device pnp 2e.207 off end # GPIO 8
284 device pnp 2e.8 off end # WDT
285 device pnp 2e.108 off end # GPIO0
286 device pnp 2e.308 off end # GPIO base address mode
287 device pnp 2e.408 off end # WDT_MEM
288 device pnp 2e.708 alias nvt_superio_gpio1 on # GPIO1
289 # Global Control Registers
290 # IRQ Polarity
291 irq 0x13 = 0xff
292 irq 0x14 = 0xff
293 # Multi Function Selection
294 irq 0x1a = 0x44
295 irq 0x1b = 0x66
296 irq 0x1c = 0x10
297 irq 0x1d = 0x00
298 irq 0x2a = 0xe0
299 irq 0x2b = 0x00
300 irq 0x2c = 0x00
301 irq 0x2d = 0x00
302
303 # GPIO1
304 irq 0xf0 = 0x08
305 irq 0xf4 = 0xf7
306 end
307 device pnp 2e.9 on # GPIO2
308 irq 0xe0 = 0xbf
309 irq 0xe9 = 0xbf
310 end
311 device pnp 2e.109 on # GPIO3
312 irq 0xe4 = 0x11
313 irq 0xe5 = 0x01
314 irq 0xe6 = 0x00
315 irq 0xea = 0x6e
316 irq 0xfe = 0x00
317 end
318 device pnp 2e.209 on # GPIO4
319 irq 0xf0 = 0x44
320 irq 0xee = 0xbb
321 end
322 device pnp 2e.309 off end # GPIO5
323 device pnp 2e.a on # ACPI
324 # Bit 4 is "power-loss last state flag", in RTC well.
325 # 1=off (default), 0=on.
326 # This might be automatic power on for this board
327 irq 0xe6 = 0x0a
328 irq 0xed = 0x01
329 end
330 device pnp 2e.b on # Hardware Monitor, Front Panel LED
331 io 0x60 = 0x0290 # HM IO base
332 io 0x62 = 0x0000 # SB-TSI IO base
333 irq 0x70 = 0x00 # HM IRQ
334 end
335 device pnp 2e.d off end # BCLK, WDT2, WDT_MEM
336 device pnp 2e.e off end # CIR Wake-up
337 device pnp 2e.f on end # GPIO push-pull / open-drain
338 device pnp 2e.14 on end # SVID, Port 80 UART
339 device pnp 2e.16 off end # DS5
340 device pnp 2e.116 off end # DS3
341 device pnp 2e.316 off end # PCHDSW
342 device pnp 2e.416 off end # DSWWOPT
343 device pnp 2e.516 on end # DS3OPT
344 device pnp 2e.616 off end # DSDSS
345 device pnp 2e.716 off end # DSPU
346 end
347 end
348 end
349 # AST2500 SuperIO
350 chip superio/common
351 device pnp 4e.0 on
352 chip superio/aspeed/ast2400
353 device pnp 4e.2 on # SUART1
354 io 0x60 = 0x3f8
355 irq 0x70 = 0x04
356 drq 0xf0 = 0x00
357 end
358 device pnp 4e.3 off end # SUART2
359 device pnp 4e.4 off # SWC
360 io 0x60 = 0xa00
361 io 0x62 = 0xa10
362 io 0x64 = 0xa20
363 io 0x66 = 0xa30
364 irq 0x70 = 0x09
365 end
366 device pnp 4e.5 off end # KBC
367 device pnp 4e.7 off end # GPIO
368 device pnp 4e.b off end # SUART3
369 device pnp 4e.c off end # SUART4
370 device pnp 4e.d on # iLPC2AHB
371 irq 0x70 = 0x00
372 end
373 device pnp 4e.e on # Mailbox
374 io 0x60 = 0xa40
375 irq 0x70 = 0x00
376 end
377 end
378 end
379 end
380 chip drivers/pc80/tpm
381 # The TPM header has SERIRQ#, but it is not
382 # connected on the TPM module - no TPM IRQ.
383 device pnp 0c31.0 on end
384 end
385 end
386 device ref p2sb off end
387 device ref pmc hidden end
388 device ref hda off end
389 device ref smbus on end
390 device ref fast_spi on end
391 end
392 end
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