soc/*: Explicitly include static.h for DEV_PTR
[coreboot.git] / util / bincfg / gbe-ich9m.set
blobf324a555263e3d3812d972bac65546fedd73c96c
1 # SPDX-License-Identifier: GPL-3.0-or-later
3 # GbE values for ICH9M
5         # Hardcoded chipset values
6         "reserved04" = 0xffff,
7         "version05" = 0x1083,
8         "reserved06" = 0xffff,
9         "reserved07" = 0xffff,
10         "pbalow" = 0xffff,
11         "pbahigh" = 0xffff,
12         "pci_loadvid" = 1,
13         "pci_loadssid" = 1,
14         "pci_pmen" = 1,
15         "pci_auxpwr" = 1,
16         "pci_reserved4" = 1,
17         "sh_phy_enpwrdown" = 1,
18         "sh_reserved1" = 0x5,
19         "sh_reserved3" = 1,
20         "sh_sign" = 0x2,
21         "cw1_extcfgptr" = 0x020,
22         "cw1_oemload" = 1,
23         "cw1_reserved1" = 1,
24         "cw2_extphylen" = 0x05,
25         "l1_reserved2" = 1,
26         "l1_reserved4" = 1,
27         "l1_lplu_non_d0a" = 1,
28         "l1_gbedis_non_d0a" = 1,
29         "reserved19" = 0x2b40,
30         "reserved1a" = 0x0043,
31         "reserved1c" = 0x10f5,
32         "reserved1d" = 0xbaad,
33         "_82567lm" = 0x10f5,
34         "_82567lf" = 0x10bf,
35         "reserved20" = 0xbaad,
36         "_82567v" = 0x10cb,
37         "reserved22_0" = 0xbaad,
38         "reserved22_1" = 0xbaad,
40         # Hardcoded PXE setup (disabled)
41         "pxe30_defbootsel" = 0x3,
42         "pxe30_ctrlsprompt" = 0x3,
43         "pxe30_pxeabsent" = 1,
44         "pxe31_disablemenu" = 1,
45         "pxe31_disabletitle" = 1,
46         "pxe31_signature" = 1,
47         "pxe32_buildnum" = 0x18,
48         "pxe32_minorversion" = 0x3,
49         "pxe32_majorversion" = 0x1,
50         "pxe33_basecodeabsent" = 1,
51         "pxe33_undipresent" = 1,
52         "pxe33_reserved1" = 1,
53         "pxe33_signature" = 1,
54         "pxe_padding"[11] = 0xffff,
56         # GbE power settings
57         "lanpwr_d3pwr" = 1,
58         "lanpwr_d0pwr" = 13,
60         # GbE LED modes
61         "l1_led1mode" = 0xb,
62         "l1_led1blinks" = 1,
63         "l02_led0mode" = 0x2,
64         "l02_led2mode" = 0x1,
66         # Padding 0xf80 bytes
67         "padding"[0xf80] = 0xff,
69         # TODO: make command line switch for these
71         # Configurable PCI IDs
72         "ssdid" = 0x20ee,
73         "ssvid" = 0x17aa,
74         "did" = 0x10f5,
75         "vid" = 0x8086,
77         # This example sets MAC address to 00:11:22:33:44:55
78         "macaddress0" = 0x00,
79         "macaddress1" = 0x11,
80         "macaddress2" = 0x22,
81         "macaddress3" = 0x33,
82         "macaddress4" = 0x44,
83         "macaddress5" = 0x55