payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / drivers / uart / pl011.c
blob0a73d829adf9833b414f8dc1e8c518097e51fb12
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <boot/coreboot_tables.h>
5 #include <console/uart.h>
6 #include <drivers/uart/pl011.h>
8 void uart_init(unsigned int idx)
12 void uart_tx_byte(unsigned int idx, unsigned char data)
14 struct pl011_uart *regs = uart_platform_baseptr(idx);
16 write8(&regs->dr, data);
17 uart_tx_flush(idx);
20 void uart_tx_flush(unsigned int idx)
22 struct pl011_uart *regs = uart_platform_baseptr(idx);
24 /* FIXME: add a timeout */
25 while (!(read32(&regs->fr) & PL011_UARTFR_TXFE))
29 unsigned char uart_rx_byte(unsigned int idx)
31 struct pl011_uart *regs = uart_platform_baseptr(idx);
33 while (read32(&regs->fr) & PL011_UARTFR_RXFE)
35 return read8(&regs->dr);
38 void uart_fill_lb(void *data)
40 struct lb_serial serial;
41 serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
42 serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
43 serial.baud = get_uart_baudrate();
44 serial.regwidth = 1;
45 serial.input_hertz = uart_platform_refclk();
46 serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
47 lb_add_serial(&serial, data);
49 lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);