src/drivers/uart/uart8250io.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <arch/io.h>
   4 #include <boot/coreboot_tables.h>
   5 #include <console/uart.h>
   6 #include "uart8250reg.h"
   7
   8 /* Should support 8250, 16450, 16550, 16550A type UARTs */
   9
  10 /* Expected character delay at 1200bps is 9ms for a working UART
  11  * and no flow-control. Assume UART as stuck if shift register
  12  * or FIFO takes more than 50ms per character to appear empty.
  13  *
  14  * Estimated that inb() from UART takes 1 microsecond.
  15  */
  16 #define SINGLE_CHAR_TIMEOUT     (50 * 1000)
  17 #define FIFO_TIMEOUT            (16 * SINGLE_CHAR_TIMEOUT)
  18
  19 static int uart8250_can_tx_byte(unsigned int base_port)
  20 {
  21         return inb(base_port + UART8250_LSR) & UART8250_LSR_THRE;
  22 }
  23
  24 static void uart8250_tx_byte(unsigned int base_port, unsigned char data)
  25 {
  26         unsigned long int i = SINGLE_CHAR_TIMEOUT;
  27         while (i-- && !uart8250_can_tx_byte(base_port));
  28         outb(data, base_port + UART8250_TBR);
  29 }
  30
  31 static void uart8250_tx_flush(unsigned int base_port)
  32 {
  33         unsigned long int i = FIFO_TIMEOUT;
  34         while (i-- && !(inb(base_port + UART8250_LSR) & UART8250_LSR_TEMT));
  35 }
  36
  37 static int uart8250_can_rx_byte(unsigned int base_port)
  38 {
  39         return inb(base_port + UART8250_LSR) & UART8250_LSR_DR;
  40 }
  41
  42 static unsigned char uart8250_rx_byte(unsigned int base_port)
  43 {
  44         unsigned long int i = SINGLE_CHAR_TIMEOUT;
  45         while (i && !uart8250_can_rx_byte(base_port))
  46                 i--;
  47
  48         if (i)
  49                 return inb(base_port + UART8250_RBR);
  50         else
  51                 return 0x0;
  52 }
  53
  54 static void uart8250_init(unsigned int base_port, unsigned int divisor)
  55 {
  56         /* Disable interrupts */
  57         outb(0x0, base_port + UART8250_IER);
  58         /* Enable FIFOs */
  59         outb(UART8250_FCR_FIFO_EN, base_port + UART8250_FCR);
  60
  61         /* assert DTR and RTS so the other end is happy */
  62         outb(UART8250_MCR_DTR | UART8250_MCR_RTS, base_port + UART8250_MCR);
  63
  64         /* DLAB on */
  65         outb(UART8250_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART8250_LCR);
  66
  67         /* Set Baud Rate Divisor. 12 ==> 9600 Baud */
  68         outb(divisor & 0xFF,   base_port + UART8250_DLL);
  69         outb((divisor >> 8) & 0xFF,    base_port + UART8250_DLM);
  70
  71         /* Set to 3 for 8N1 */
  72         outb(CONFIG_TTYS0_LCS, base_port + UART8250_LCR);
  73 }
  74
  75 static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  76
  77 uintptr_t uart_platform_base(unsigned int idx)
  78 {
  79         if (idx < ARRAY_SIZE(bases))
  80                 return bases[idx];
  81         return 0;
  82 }
  83
  84 void uart_init(unsigned int idx)
  85 {
  86         if (!CONFIG(DRIVERS_UART_8250IO_SKIP_INIT)) {
  87                 unsigned int div;
  88                 div = uart_baudrate_divisor(get_uart_baudrate(),
  89                         uart_platform_refclk(), uart_input_clock_divider());
  90                 uart8250_init(uart_platform_base(idx), div);
  91         }
  92 }
  93
  94 void uart_tx_byte(unsigned int idx, unsigned char data)
  95 {
  96         uart8250_tx_byte(uart_platform_base(idx), data);
  97 }
  98
  99 unsigned char uart_rx_byte(unsigned int idx)
 100 {
 101         return uart8250_rx_byte(uart_platform_base(idx));
 102 }
 103
 104 void uart_tx_flush(unsigned int idx)
 105 {
 106         uart8250_tx_flush(uart_platform_base(idx));
 107 }
 108
 109 void uart_fill_lb(void *data)
 110 {
 111         struct lb_serial serial;
 112         serial.type = LB_SERIAL_TYPE_IO_MAPPED;
 113         serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
 114         serial.baud = get_uart_baudrate();
 115         serial.regwidth = 1;
 116         serial.input_hertz = uart_platform_refclk();
 117         serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 118         lb_add_serial(&serial, data);
 119
 120         lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
 121 }