1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef __SRC_INCLUDE_GPIO_H__
4 #define __SRC_INCLUDE_GPIO_H__
9 /* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */
10 _Static_assert(sizeof(gpio_t
) <= sizeof(u32
), "gpio_t doesn't fit in lb_gpio");
12 /* The following functions must be implemented by SoC/board code. */
13 int gpio_get(gpio_t gpio
);
14 void gpio_set(gpio_t gpio
, int value
);
15 void gpio_input_pulldown(gpio_t gpio
);
16 void gpio_input_pullup(gpio_t gpio
);
17 void gpio_input(gpio_t gpio
);
18 void gpio_output(gpio_t gpio
, int value
);
19 uint32_t _gpio_base3_value(const gpio_t gpio
[], int num_gpio
, int binary_first
);
22 * This function may be implemented by SoC/board code to provide
23 * a mapping from a GPIO pin to controller by returning the ACPI
24 * path for the controller that owns this GPIO.
26 * If not implemented the default handler will return NULL.
28 const char *gpio_acpi_path(gpio_t gpio
);
31 * This function may be implemented by SoC/board code to provide
32 * a mapping from the internal representation of a GPIO to the 16bit
33 * value used in an ACPI GPIO pin table entry.
35 * If not implemented by the SOC the default handler will return 0
36 * because the underlying type of gpio_t is unknown.
38 uint16_t gpio_acpi_pin(gpio_t gpio
);
41 * Read the value presented by the set of GPIOs, when each pin is interpreted
42 * as a base-2 digit (LOW = 0, HIGH = 1).
44 * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
45 * num_gpio: number of pins to read.
47 * There are also pulldown and pullup variants which default each gpio to
48 * be configured with an internal pulldown and pullup, respectively.
50 uint32_t gpio_base2_value(const gpio_t gpio
[], int num_gpio
);
51 uint32_t gpio_pulldown_base2_value(const gpio_t gpio
[], int num_gpio
);
52 uint32_t gpio_pullup_base2_value(const gpio_t gpio
[], int num_gpio
);
55 * Read the value presented by the set of GPIOs, when each pin is interpreted
56 * as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2).
57 * Example: X1 = Z, X2 = 1 -> gpio_base3_value({GPIO(X1), GPIO(X2)}) = 5
58 * BASE3() from <base3.h> can generate numbers to compare the result to.
60 * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
61 * num_gpio: number of pins to read.
63 static inline uint32_t gpio_base3_value(const gpio_t gpio
[], int num_gpio
)
65 return _gpio_base3_value(gpio
, num_gpio
, 0);
69 * Read the value presented by the set of GPIOs, when each pin is interpreted
70 * as a base-3 digit (LOW = 0, HIGH = 1, Z/floating = 2) in a non-standard
71 * ternary number system where the first 2^n natural numbers are represented
72 * as they would be in a binary system (without any Z digits), and the following
73 * 3^n-2^n numbers use the remaining ternary representations in the normal
74 * ternary system order (skipping the values that were already used up).
75 * This is useful for boards which initially used a binary board ID and later
76 * decided to switch to tri-state after some revisions have already been built.
77 * Example: For num_gpio = 2 we get the following representation:
83 * 3 1 1 // Start counting ternaries back at 0 after this
84 * 4 0 2 // Skipping 00 and 01 which are already used up
85 * 5 1 2 // Skipping 10 and 11 which are already used up
90 * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1].
91 * num_gpio: number of pins to read.
93 static inline uint32_t gpio_binary_first_base3_value(const gpio_t gpio
[],
96 return _gpio_base3_value(gpio
, num_gpio
, 1);
99 #endif /* __SRC_INCLUDE_GPIO_H__ */