payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / 51nb / x210 / hda_verb.c
blob730cc443a77ce220ac2c637af0e6bd64d4fa54b1
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/azalia_device.h>
5 const u32 cim_verb_data[] = {
6 /* coreboot specific header */
7 0x14f15069, /* Codec Vendor / Device ID: Conexant CX20585 */
8 0x17aa2155, /* Subsystem ID */
9 12, /* Number of jacks (NID entries) */
11 0x0017ff00, /* Function Reset */
12 0x0017ff00, /* Double Function Reset */
13 0x0017ff00,
14 0x0017ff00,
16 /* Bits 31:28 - Codec Address */
17 /* Bits 27:20 - NID */
18 /* Bits 19:8 - Verb ID */
19 /* Bits 7:0 - Payload */
21 /* NID 0x01, HDA Codec Subsystem ID */
22 AZALIA_SUBVENDOR(0, 0x17aa2155),
24 /* Pin Widget Verb Table */
25 AZALIA_PIN_CFG(0, 0x19, 0x042140f0),
26 AZALIA_PIN_CFG(0, 0x1a, 0x61a190f0),
27 AZALIA_PIN_CFG(0, 0x1b, 0x04a190f0),
28 AZALIA_PIN_CFG(0, 0x1c, 0x612140f0),
29 AZALIA_PIN_CFG(0, 0x1d, 0x601700f0),
30 AZALIA_PIN_CFG(0, 0x1e, 0x40f001f0),
31 AZALIA_PIN_CFG(0, 0x1f, 0x901701f0),
32 AZALIA_PIN_CFG(0, 0x1B, 0x40f001f0),
33 AZALIA_PIN_CFG(0, 0x22, 0x40f001f0),
34 AZALIA_PIN_CFG(0, 0x23, 0x90a601f0),
37 const u32 pc_beep_verbs[] = {
39 AZALIA_ARRAY_SIZES;