payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / asrock / e350m1 / BiosCallOuts.c
blobac42bd4f457fc377828424f2d864c2edf590c086
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <AGESA.h>
4 #include <amdlib.h>
5 #include <amdblocks/acpimmio.h>
6 #include <northbridge/amd/agesa/BiosCallOuts.h>
7 #include <SB800.h>
9 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
11 const BIOS_CALLOUT_STRUCT BiosCallouts[] =
13 {AGESA_DO_RESET, agesa_Reset },
14 {AGESA_READ_SPD, agesa_ReadSpd },
15 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
16 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
17 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
18 {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
19 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
20 {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported },
22 const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
24 /* Call the host environment interface to provide a user hook opportunity. */
25 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr)
27 AGESA_STATUS Status;
28 MEM_DATA_STRUCT *MemData;
29 UINT32 GpioMmioAddr;
30 UINT8 Data8;
31 UINT8 TempData8;
33 MemData = ConfigPtr;
35 Status = AGESA_SUCCESS;
36 GpioMmioAddr = (uintptr_t)acpimmio_gpio_100;
38 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
39 Data8 &= ~BIT5;
40 TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
41 TempData8 &= 0x03;
42 TempData8 |= Data8;
43 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
45 Data8 |= BIT2+BIT3;
46 Data8 &= ~BIT4;
47 TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
48 TempData8 &= 0x23;
49 TempData8 |= Data8;
50 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
51 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
52 Data8 &= ~BIT5;
53 TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
54 TempData8 &= 0x03;
55 TempData8 |= Data8;
56 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
57 Data8 |= BIT2+BIT3;
58 Data8 &= ~BIT4;
59 TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
60 TempData8 &= 0x23;
61 TempData8 |= Data8;
62 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
65 * this seems to be just copy-pasted from the AMD reference boards and
66 * needs some investigation
68 switch (MemData->ParameterListPtr->DDR3Voltage) {
69 case VOLT1_35:
70 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
71 Data8 &= ~(UINT8)BIT6;
72 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
73 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
74 Data8 |= (UINT8)BIT6;
75 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
76 break;
77 case VOLT1_25:
78 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
79 Data8 &= ~(UINT8)BIT6;
80 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
81 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
82 Data8 &= ~(UINT8)BIT6;
83 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
84 break;
85 case VOLT1_5:
86 default:
87 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
88 Data8 |= (UINT8)BIT6;
89 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
90 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
91 Data8 &= ~(UINT8)BIT6;
92 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
94 /* disable memory clear for boot time reduction */
95 MemData->ParameterListPtr->EnableMemClr = FALSE;
96 return Status;