1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* Routing is in System Bus scope */
7 /* Bus 0, Dev 0 - RS780 Host Controller */
8 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
9 Package(){0x0001FFFF, 0, INTC, 0 },
10 Package(){0x0001FFFF, 1, INTD, 0 },
11 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
12 Package(){0x0002FFFF, 0, INTC, 0 },
13 Package(){0x0002FFFF, 1, INTD, 0 },
14 Package(){0x0002FFFF, 2, INTA, 0 },
15 Package(){0x0002FFFF, 3, INTB, 0 },
16 /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
17 Package(){0x0003FFFF, 0, INTD, 0 },
18 Package(){0x0003FFFF, 1, INTA, 0 },
19 Package(){0x0003FFFF, 2, INTB, 0 },
20 Package(){0x0003FFFF, 3, INTC, 0 },
21 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
22 Package(){0x0004FFFF, 0, INTA, 0 },
23 Package(){0x0004FFFF, 1, INTB, 0 },
24 Package(){0x0004FFFF, 2, INTC, 0 },
25 Package(){0x0004FFFF, 3, INTD, 0 },
26 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
27 Package(){0x0005FFFF, 0, INTB, 0 },
28 Package(){0x0005FFFF, 1, INTC, 0 },
29 Package(){0x0005FFFF, 2, INTD, 0 },
30 Package(){0x0005FFFF, 3, INTA, 0 },
31 /* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
32 Package(){0x0006FFFF, 0, INTC, 0 },
33 Package(){0x0006FFFF, 1, INTD, 0 },
34 Package(){0x0006FFFF, 2, INTA, 0 },
35 Package(){0x0006FFFF, 3, INTB, 0 },
36 /* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */
37 Package(){0x0007FFFF, 0, INTD, 0 },
38 Package(){0x0007FFFF, 1, INTA, 0 },
39 Package(){0x0007FFFF, 2, INTB, 0 },
40 Package(){0x0007FFFF, 3, INTC, 0 },
42 Package(){0x0009FFFF, 0, INTB, 0 },
43 Package(){0x0009FFFF, 1, INTC, 0 },
44 Package(){0x0009FFFF, 2, INTD, 0 },
45 Package(){0x0009FFFF, 3, INTA, 0 },
47 Package(){0x000AFFFF, 0, INTC, 0 },
48 Package(){0x000AFFFF, 1, INTD, 0 },
49 Package(){0x000AFFFF, 2, INTA, 0 },
50 Package(){0x000AFFFF, 3, INTB, 0 },
52 Package(){0x000BFFFF, 0, INTD, 0 },
53 Package(){0x000BFFFF, 1, INTA, 0 },
54 Package(){0x000BFFFF, 2, INTB, 0 },
55 Package(){0x000BFFFF, 3, INTC, 0 },
57 Package(){0x000CFFFF, 0, INTA, 0 },
58 Package(){0x000CFFFF, 1, INTB, 0 },
59 Package(){0x000CFFFF, 2, INTC, 0 },
60 Package(){0x000CFFFF, 3, INTD, 0 },
62 /* Bus 0, Funct 8 - Southbridge port (normally hidden) */
65 /* Bus 0, Dev 17 - SATA controller #2 */
66 /* Bus 0, Dev 18 - SATA controller #1 */
67 Package(){0x0011FFFF, 0, INTD, 0 },
69 /* Bus 0, Dev 19 - USB: OHCI, dev 18,19 func 0-2, dev 20 func 5;
70 * EHCI, dev 18, 19 func 2 */
71 Package(){0x0012FFFF, 0, INTC, 0 },
72 Package(){0x0012FFFF, 1, INTB, 0 },
74 Package(){0x0013FFFF, 0, INTC, 0 },
75 Package(){0x0013FFFF, 1, INTB, 0 },
77 Package(){0x0016FFFF, 0, INTC, 0 },
78 Package(){0x0016FFFF, 1, INTB, 0 },
80 /* Package(){0x0014FFFF, 1, INTA, 0 }, */
82 /* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:USB */
83 Package(){0x0014FFFF, 0, INTA, 0 },
84 Package(){0x0014FFFF, 1, INTB, 0 },
85 Package(){0x0014FFFF, 2, INTC, 0 },
86 Package(){0x0014FFFF, 3, INTD, 0 },
88 Package(){0x0015FFFF, 0, INTA, 0 },
89 Package(){0x0015FFFF, 1, INTB, 0 },
90 Package(){0x0015FFFF, 2, INTC, 0 },
91 Package(){0x0015FFFF, 3, INTD, 0 },
95 /* NB devices in APIC mode */
96 /* Bus 0, Dev 0 - RS780 Host Controller */
98 /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
99 Package(){0x0001FFFF, 0, 0, 18 },
100 Package(){0x0001FFFF, 1, 0, 19 },
102 /* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
103 Package(){0x0002FFFF, 0, 0, 18 },
104 /* Package(){0x0002FFFF, 1, 0, 19 }, */
105 /* Package(){0x0002FFFF, 2, 0, 16 }, */
106 /* Package(){0x0002FFFF, 3, 0, 17 }, */
108 /* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
109 Package(){0x0003FFFF, 0, 0, 19 },
110 Package(){0x0003FFFF, 1, 0, 16 },
111 Package(){0x0003FFFF, 2, 0, 17 },
112 Package(){0x0003FFFF, 3, 0, 18 },
114 /* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
115 Package(){0x0004FFFF, 0, 0, 16 },
116 Package(){0x0004FFFF, 1, 0, 17 },
117 Package(){0x0004FFFF, 2, 0, 18 },
118 Package(){0x0004FFFF, 3, 0, 19 },
120 /* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
121 Package(){0x0005FFFF, 0, 0, 17 },
122 Package(){0x0005FFFF, 1, 0, 18 },
123 Package(){0x0005FFFF, 2, 0, 19 },
124 Package(){0x0005FFFF, 3, 0, 16 },
126 /* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
127 Package(){0x0006FFFF, 0, 0, 18 },
128 Package(){0x0006FFFF, 1, 0, 19 },
129 Package(){0x0006FFFF, 2, 0, 16 },
130 Package(){0x0006FFFF, 3, 0, 17 },
132 /* Bus 0, Dev 7 - PCIe Bridge for network card */
133 Package(){0x0007FFFF, 0, 0, 19 },
134 Package(){0x0007FFFF, 1, 0, 16 },
135 Package(){0x0007FFFF, 2, 0, 17 },
136 Package(){0x0007FFFF, 3, 0, 18 },
138 /* Bus 0, Dev 9 - PCIe Bridge for network card */
139 Package(){0x0009FFFF, 0, 0, 17 },
140 Package(){0x0009FFFF, 1, 0, 16 },
141 Package(){0x0009FFFF, 2, 0, 17 },
142 Package(){0x0009FFFF, 3, 0, 18 },
143 /* Bus 0, Dev A - PCIe Bridge for network card */
144 Package(){0x000AFFFF, 0, 0, 18 },
145 Package(){0x000AFFFF, 1, 0, 16 },
146 Package(){0x000AFFFF, 2, 0, 17 },
147 Package(){0x000AFFFF, 3, 0, 18 },
148 /* Bus 0, Funct 8 - Southbridge port (normally hidden) */
150 /* SB devices in APIC mode */
151 /* Bus 0, Dev 17 - SATA controller #2 */
152 /* Bus 0, Dev 18 - SATA controller #1 */
153 Package(){0x0011FFFF, 0, 0, 19 },
155 /* Bus 0, Dev 19 - USB: OHCI, dev 18,19 func 0-2, dev 20 func 5;
156 * EHCI, dev 18, 19 func 2 */
157 Package(){0x0012FFFF, 0, 0, 18 },
158 Package(){0x0012FFFF, 1, 0, 17 },
159 /* Package(){0x0012FFFF, 2, 0, 18 }, */
161 Package(){0x0013FFFF, 0, 0, 18 },
162 Package(){0x0013FFFF, 1, 0, 17 },
163 /* Package(){0x0013FFFF, 2, 0, 16 }, */
165 /* Package(){0x00140000, 0, 0, 16 }, */
167 Package(){0x0016FFFF, 0, 0, 18 },
168 Package(){0x0016FFFF, 1, 0, 17 },
170 /* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */
171 Package(){0x0014FFFF, 0, 0, 16 },
172 Package(){0x0014FFFF, 1, 0, 17 },
173 Package(){0x0014FFFF, 2, 0, 18 },
174 Package(){0x0014FFFF, 3, 0, 19 },
175 /* Package(){0x00140004, 2, 0, 18 }, */
176 /* Package(){0x00140004, 3, 0, 19 }, */
177 /* Package(){0x00140005, 1, 0, 17 }, */
178 /* Package(){0x00140006, 1, 0, 17 }, */
181 Package(){0x0015FFFF, 0, 0, 16 },
182 Package(){0x0015FFFF, 1, 0, 17 },
183 Package(){0x0015FFFF, 2, 0, 18 },
184 Package(){0x0015FFFF, 3, 0, 19 },
188 /* Internal graphics - RS780 VGA, Bus1, Dev5 */
189 Package(){0x0005FFFF, 0, INTA, 0 },
190 Package(){0x0005FFFF, 1, INTB, 0 },
191 Package(){0x0005FFFF, 2, INTC, 0 },
192 Package(){0x0005FFFF, 3, INTD, 0 },
194 Name(APR1, Package(){
195 /* Internal graphics - RS780 VGA, Bus1, Dev5 */
196 Package(){0x0005FFFF, 0, 0, 18 },
197 Package(){0x0005FFFF, 1, 0, 19 },
198 /* Package(){0x0005FFFF, 2, 0, 20 }, */
199 /* Package(){0x0005FFFF, 3, 0, 17 }, */
203 /* The external GFX - Hooked to PCIe slot 2 */
204 Package(){0x0000FFFF, 0, INTC, 0 },
205 Package(){0x0000FFFF, 1, INTD, 0 },
206 Package(){0x0000FFFF, 2, INTA, 0 },
207 Package(){0x0000FFFF, 3, INTB, 0 },
209 Name(APS2, Package(){
210 /* The external GFX - Hooked to PCIe slot 2 */
211 Package(){0x0000FFFF, 0, 0, 18 },
212 Package(){0x0000FFFF, 1, 0, 19 },
213 Package(){0x0000FFFF, 2, 0, 16 },
214 Package(){0x0000FFFF, 3, 0, 17 },
218 /* PCIe slot - Hooked to PCIe slot 4 */
219 Package(){0x0000FFFF, 0, INTA, 0 },
220 Package(){0x0000FFFF, 1, INTB, 0 },
221 Package(){0x0000FFFF, 2, INTC, 0 },
222 Package(){0x0000FFFF, 3, INTD, 0 },
224 Name(APS4, Package(){
225 /* PCIe slot - Hooked to PCIe slot 4 */
226 Package(){0x0000FFFF, 0, 0, 16 },
227 Package(){0x0000FFFF, 1, 0, 17 },
228 Package(){0x0000FFFF, 2, 0, 18 },
229 Package(){0x0000FFFF, 3, 0, 19 },
233 /* PCIe slot - Hooked to PCIe slot 5 */
234 Package(){0x0000FFFF, 0, INTB, 0 },
235 Package(){0x0000FFFF, 1, INTC, 0 },
236 Package(){0x0000FFFF, 2, INTD, 0 },
237 Package(){0x0000FFFF, 3, INTA, 0 },
239 Name(APS5, Package(){
240 /* PCIe slot - Hooked to PCIe slot 5 */
241 Package(){0x0000FFFF, 0, 0, 17 },
242 Package(){0x0000FFFF, 1, 0, 18 },
243 Package(){0x0000FFFF, 2, 0, 19 },
244 Package(){0x0000FFFF, 3, 0, 16 },
248 /* PCIe slot - Hooked to PCIe slot 6 */
249 Package(){0x0000FFFF, 0, INTC, 0 },
250 Package(){0x0000FFFF, 1, INTD, 0 },
251 Package(){0x0000FFFF, 2, INTA, 0 },
252 Package(){0x0000FFFF, 3, INTB, 0 },
254 Name(APS6, Package(){
255 /* PCIe slot - Hooked to PCIe slot 6 */
256 Package(){0x0000FFFF, 0, 0, 18 },
257 Package(){0x0000FFFF, 1, 0, 19 },
258 Package(){0x0000FFFF, 2, 0, 16 },
259 Package(){0x0000FFFF, 3, 0, 17 },
263 /* The onboard Ethernet chip - Hooked to PCIe slot 7 */
264 Package(){0x0000FFFF, 0, INTD, 0 },
265 Package(){0x0000FFFF, 1, INTA, 0 },
266 Package(){0x0000FFFF, 2, INTB, 0 },
267 Package(){0x0000FFFF, 3, INTC, 0 },
269 Name(APS7, Package(){
270 /* The onboard Ethernet chip - Hooked to PCIe slot 7 */
271 Package(){0x0000FFFF, 0, 0, 19 },
272 Package(){0x0000FFFF, 1, 0, 16 },
273 Package(){0x0000FFFF, 2, 0, 17 },
274 Package(){0x0000FFFF, 3, 0, 18 },
278 /* PCIe slot - Hooked to PCIe slot 9 */
279 Package(){0x0000FFFF, 0, INTD, 0 },
280 Package(){0x0000FFFF, 1, INTA, 0 },
281 Package(){0x0000FFFF, 2, INTB, 0 },
282 Package(){0x0000FFFF, 3, INTC, 0 },
284 Name(APS9, Package(){
285 /* PCIe slot - Hooked to PCIe slot 9 */
286 Package(){0x0000FFFF, 0, 0, 17 },
287 Package(){0x0000FFFF, 1, 0, 18 },
288 Package(){0x0000FFFF, 2, 0, 19 },
289 Package(){0x0000FFFF, 3, 0, 16 },
293 /* PCIe slot - Hooked to PCIe slot 10 */
294 Package(){0x0000FFFF, 0, INTD, 0 },
295 Package(){0x0000FFFF, 1, INTA, 0 },
296 Package(){0x0000FFFF, 2, INTB, 0 },
297 Package(){0x0000FFFF, 3, INTC, 0 },
299 Name(APSA, Package(){
300 /* PCIe slot - Hooked to PCIe slot 10 */
301 Package(){0x0000FFFF, 0, 0, 18 },
302 Package(){0x0000FFFF, 1, 0, 19 },
303 Package(){0x0000FFFF, 2, 0, 16 },
304 Package(){0x0000FFFF, 3, 0, 17 },
308 /* PCIe slot - Hooked to PCIe slot 10 */
309 Package(){0x0000FFFF, 0, INTA, 0 },
310 Package(){0x0000FFFF, 1, INTB, 0 },
311 Package(){0x0000FFFF, 2, INTC, 0 },
312 Package(){0x0000FFFF, 3, INTD, 0 },
314 Name(APE0, Package(){
315 /* PCIe slot - Hooked to PCIe */
316 Package(){0x0000FFFF, 0, 0, 16 },
317 Package(){0x0000FFFF, 1, 0, 17 },
318 Package(){0x0000FFFF, 2, 0, 18 },
319 Package(){0x0000FFFF, 3, 0, 19 },
323 /* PCIe slot - Hooked to PCIe slot 10 */
324 Package(){0x0000FFFF, 0, INTB, 0 },
325 Package(){0x0000FFFF, 1, INTC, 0 },
326 Package(){0x0000FFFF, 2, INTD, 0 },
327 Package(){0x0000FFFF, 3, INTA, 0 },
329 Name(APE1, Package(){
330 /* PCIe slot - Hooked to PCIe */
331 Package(){0x0000FFFF, 0, 0, 17 },
332 Package(){0x0000FFFF, 1, 0, 18 },
333 Package(){0x0000FFFF, 2, 0, 19 },
334 Package(){0x0000FFFF, 3, 0, 16 },
338 /* PCIe slot - Hooked to PCIe slot 10 */
339 Package(){0x0000FFFF, 0, INTC, 0 },
340 Package(){0x0000FFFF, 1, INTD, 0 },
341 Package(){0x0000FFFF, 2, INTA, 0 },
342 Package(){0x0000FFFF, 3, INTB, 0 },
344 Name(APE2, Package(){
345 /* PCIe slot - Hooked to PCIe */
346 Package(){0x0000FFFF, 0, 0, 18 },
347 Package(){0x0000FFFF, 1, 0, 19 },
348 Package(){0x0000FFFF, 2, 0, 16 },
349 Package(){0x0000FFFF, 3, 0, 17 },
353 /* PCIe slot - Hooked to PCIe slot 10 */
354 Package(){0x0000FFFF, 0, INTD, 0 },
355 Package(){0x0000FFFF, 1, INTA, 0 },
356 Package(){0x0000FFFF, 2, INTB, 0 },
357 Package(){0x0000FFFF, 3, INTC, 0 },
359 Name(APE3, Package(){
360 /* PCIe slot - Hooked to PCIe */
361 Package(){0x0000FFFF, 0, 0, 19 },
362 Package(){0x0000FFFF, 1, 0, 16 },
363 Package(){0x0000FFFF, 2, 0, 17 },
364 Package(){0x0000FFFF, 3, 0, 18 },
367 Name(PCIB, Package(){
368 /* PCI slots: slot 0, slot 1, slot 2 behind Dev14, Fun4. */
369 Package(){0x0005FFFF, 0, 0, 0x14 },
370 Package(){0x0005FFFF, 1, 0, 0x15 },
371 Package(){0x0005FFFF, 2, 0, 0x16 },
372 Package(){0x0005FFFF, 3, 0, 0x17 },
373 Package(){0x0006FFFF, 0, 0, 0x15 },
374 Package(){0x0006FFFF, 1, 0, 0x16 },
375 Package(){0x0006FFFF, 2, 0, 0x17 },
376 Package(){0x0006FFFF, 3, 0, 0x14 },
377 Package(){0x0007FFFF, 0, 0, 0x16 },
378 Package(){0x0007FFFF, 1, 0, 0x17 },
379 Package(){0x0007FFFF, 2, 0, 0x14 },
380 Package(){0x0007FFFF, 3, 0, 0x15 },