src/mainboard/asrock/imb-a180/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/acpimmio.h>
   4 #include <bootblock_common.h>
   5 #include <device/pnp_type.h>
   6 #include <superio/winbond/common/winbond.h>
   7 #include <superio/winbond/w83627uhg/w83627uhg.h>
   8
   9 #define SERIAL_DEV PNP_DEV(0x2e, W83627UHG_SP1)
  10
  11 void bootblock_mainboard_early_init(void)
  12 {
  13         /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
  14         pm_write8(0xea, 0x1);
  15
  16         /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
  17         misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff);
  18
  19         /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
  20         misc_write32(0x40, misc_read32(0x40) & 0xffffbffb);
  21
  22         /* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */
  23         winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  24 }