payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / facebook / fbg1701 / cpld.c
blob465c3be77b995af6380401eb64e06c80a5644b33
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <arch/io.h>
4 #include "cpld.h"
6 /* CPLD definitions */
7 #define CPLD_PCB_VERSION_PORT 0x283
8 #define CPLD_PCB_VERSION_MASK 0xF0
9 #define CPLD_PCB_VERSION_BIT 4
11 #define CPLD_RESET_PORT 0x287
12 #define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20
13 #define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00
15 /* Reset DSI bridge */
16 void cpld_reset_bridge(void)
18 outb(CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE, CPLD_RESET_PORT);
19 outb(CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE, CPLD_RESET_PORT);
22 /* Read PCB version */
23 unsigned int cpld_read_pcb_version(void)
25 return ((inb(CPLD_PCB_VERSION_PORT) & CPLD_PCB_VERSION_MASK) >> CPLD_PCB_VERSION_BIT);