src/mainboard/google/slippy/devicetree.cb

   1 chip northbridge/intel/haswell
   2         # IGD Displays
   3         register "gfx" = "GMA_STATIC_DISPLAYS(0)"
   4
   5         # Enable eDP Hotplug with 6ms pulse
   6         register "gpu_dp_d_hotplug" = "0x06"
   7
   8         # Disable DisplayPort C Hotplug
   9         register "gpu_dp_c_hotplug" = "0x00"
  10
  11         # Enable HDMI Hotplug with 6ms pulse
  12         register "gpu_dp_b_hotplug" = "0x06"
  13
  14         register "ec_present" = "true"
  15
  16         register "usb_xhci_on_resume" = "true"
  17
  18         device cpu_cluster 0 on
  19                 chip cpu/intel/haswell
  20                         device lapic 0 on end
  21                         # Magic APIC ID to locate this chip
  22                         device lapic 0xACAC off end
  23                 end
  24         end
  25
  26         device domain 0 on
  27                 device pci 00.0 on end # host bridge
  28                 device pci 02.0 on end # vga controller
  29                 device pci 03.0 on end # mini-hd audio
  30
  31                 chip southbridge/intel/lynxpoint
  32                         # EC range is 0x800-0x9ff
  33                         register "gen1_dec" = "0x00fc0801"
  34                         register "gen2_dec" = "0x00fc0901"
  35
  36                         # EC_SMI is GPIO34
  37                         register "alt_gp_smi_en" = "0x0004"
  38                         register "gpe0_en_1" = "0x00000000"
  39                         # EC_SCI is GPIO36
  40                         register "gpe0_en_2" = "0x00000010"
  41                         register "gpe0_en_3" = "0x00000000"
  42                         register "gpe0_en_4" = "0x00000000"
  43
  44                         register "sata_port_map" = "0x1"
  45
  46                         register "sio_acpi_mode" = "1"
  47                         register "sio_i2c0_voltage" = "0" # 3.3V
  48                         register "sio_i2c1_voltage" = "0" # 3.3V
  49
  50                         # Force enable ASPM for PCIe Port 1
  51                         register "pcie_port_force_aspm" = "0x01"
  52
  53                         # Route all USB ports to XHCI per default
  54                         register "xhci_default" = "1"
  55
  56                         device pci 13.0 off end # Smart Sound Audio DSP
  57                         device pci 14.0 on end # USB3 XHCI
  58                         device pci 15.0 on end # Serial I/O DMA
  59                         device pci 15.1 on end # I2C0
  60                         device pci 15.2 on end # I2C1
  61                         device pci 15.3 off end # GSPI0
  62                         device pci 15.4 off end # GSPI1
  63                         device pci 15.5 off end # UART0
  64                         device pci 15.6 off end # UART1
  65                         device pci 16.0 on end # Management Engine Interface 1
  66                         device pci 16.1 off end # Management Engine Interface 2
  67                         device pci 16.2 off end # Management Engine IDE-R
  68                         device pci 16.3 off end # Management Engine KT
  69                         device pci 17.0 off end # SDIO
  70                         device pci 19.0 off end # GbE
  71                         device pci 1b.0 on end # High Definition Audio
  72                         device pci 1c.0 on end # PCIe Port #1
  73                         device pci 1c.1 off end # PCIe Port #2
  74                         device pci 1c.2 off end # PCIe Port #3
  75                         device pci 1c.3 off end # PCIe Port #4
  76                         device pci 1c.4 off end # PCIe Port #5
  77                         device pci 1c.5 off end # PCIe Port #6
  78                         device pci 1d.0 on end # USB2 EHCI
  79                         device pci 1e.0 off end # PCI bridge
  80                         device pci 1f.0 on
  81                                 chip drivers/pc80/tpm
  82                                         device pnp 0c31.0 on end
  83                                 end
  84                                 chip ec/google/chromeec
  85                                         # We only have one init function that
  86                                         # we need to call to initialize the
  87                                         # keyboard part of the EC.
  88                                         device pnp ff.1 on # dummy address
  89                                         end
  90                                 end
  91                         end # LPC bridge
  92                         device pci 1f.2 on end # SATA Controller
  93                         device pci 1f.3 on end # SMBus
  94                         device pci 1f.6 on end # Thermal
  95                 end
  96         end
  97 end