payloads/edk2: Disable the CPU Timer Lib unless supported
[coreboot.git] / src / mainboard / google / slippy / smihandler.c
blob16a1b18b7a467aa7b361b9ab1a0d7b77945bc27e
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <arch/io.h>
5 #include <console/console.h>
6 #include <cpu/x86/smm.h>
7 #include <soc/nvs.h>
8 #include <southbridge/intel/lynxpoint/pch.h>
9 #include <southbridge/intel/common/gpio.h>
10 #include <southbridge/intel/lynxpoint/me.h>
11 #include <northbridge/intel/haswell/haswell.h>
12 #include <cpu/intel/haswell/haswell.h>
13 #include <elog.h>
15 /* Include EC functions */
16 #include <ec/google/chromeec/ec.h>
17 #include "ec.h"
19 /* Codec enable: GPIO45 */
20 #define GPIO_PP3300_CODEC_EN 45
21 /* GPIO46 controls the WLAN_DISABLE_L signal. */
22 #define GPIO_WLAN_DISABLE_L 46
23 #define GPIO_LTE_DISABLE_L 59
25 static u8 mainboard_smi_ec(void)
27 u8 cmd = google_chromeec_get_event();
28 u32 pm1_cnt;
30 /* Log this event */
31 if (cmd)
32 elog_gsmi_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
34 switch (cmd) {
35 case EC_HOST_EVENT_LID_CLOSED:
36 printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
38 /* Go to S5 */
39 pm1_cnt = inl(get_pmbase() + PM1_CNT);
40 pm1_cnt |= (0xf << 10);
41 outl(pm1_cnt, get_pmbase() + PM1_CNT);
42 break;
45 return cmd;
48 /* gpi_sts is GPIO 47:32 */
49 void mainboard_smi_gpi(u32 gpi_sts)
51 if (gpi_sts & (1 << (EC_SMI_GPI - 32))) {
52 /* Process all pending events */
53 while (mainboard_smi_ec() != 0);
57 void mainboard_smi_sleep(u8 slp_typ)
59 /* Disable USB charging if required */
60 switch (slp_typ) {
61 case ACPI_S3:
62 if (gnvs->s3u0 == 0)
63 google_chromeec_set_usb_charge_mode(
64 0, USB_CHARGE_MODE_DISABLED);
65 if (gnvs->s3u1 == 0)
66 google_chromeec_set_usb_charge_mode(
67 1, USB_CHARGE_MODE_DISABLED);
69 /* Prevent leak from standby rail to WLAN rail in S3. */
70 set_gpio(GPIO_WLAN_DISABLE_L, 0);
71 set_gpio(GPIO_PP3300_CODEC_EN, 0);
72 /* Disable LTE */
73 set_gpio(GPIO_LTE_DISABLE_L, 0);
75 /* Enable wake events */
76 google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
77 break;
78 case ACPI_S4:
79 case ACPI_S5:
80 if (gnvs->s5u0 == 0)
81 google_chromeec_set_usb_charge_mode(
82 0, USB_CHARGE_MODE_DISABLED);
83 if (gnvs->s5u1 == 0)
84 google_chromeec_set_usb_charge_mode(
85 1, USB_CHARGE_MODE_DISABLED);
87 /* Prevent leak from standby rail to WLAN rail in S5. */
88 set_gpio(GPIO_WLAN_DISABLE_L, 0);
89 set_gpio(GPIO_PP3300_CODEC_EN, 0);
90 /* Disable LTE */
91 set_gpio(GPIO_LTE_DISABLE_L, 0);
93 /* Enable wake events */
94 google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
95 break;
98 /* Disable SCI and SMI events */
99 google_chromeec_set_smi_mask(0);
100 google_chromeec_set_sci_mask(0);
102 /* Clear pending events that may trigger immediate wake */
103 while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
107 int mainboard_smi_apmc(u8 apmc)
109 switch (apmc) {
110 case APM_CNT_ACPI_ENABLE:
111 google_chromeec_set_smi_mask(0);
112 /* Clear all pending events */
113 while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
115 google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
116 break;
117 case APM_CNT_ACPI_DISABLE:
118 google_chromeec_set_sci_mask(0);
119 /* Clear all pending events */
120 while (google_chromeec_get_event() != EC_HOST_EVENT_NONE)
122 google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
123 break;
125 return 0;