src/mainboard/intel/d945gclf/mptable.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/device.h>
   4 #include <arch/smp/mpspec.h>
   5 #include <arch/ioapic.h>
   6
   7 static void *smp_write_config_table(void *v)
   8 {
   9         struct mp_config_table *mc;
  10         int isa_bus;
  11
  12         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
  13
  14         mptable_init(mc);
  15
  16         smp_write_processors(mc);
  17
  18         mptable_write_buses(mc, NULL, &isa_bus);
  19
  20         /* I/O APICs:   APIC ID Version State           Address */
  21         u8 ioapic_id = smp_write_ioapic_from_hw(mc, VIO_APIC_VADDR);
  22
  23         /* Legacy Interrupts */
  24
  25         mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
  26
  27         /* Builtin devices on Bus 0 */
  28         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x02, 0, ioapic_id, 0x10);
  29         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1f, 1, ioapic_id, 0x13);
  30         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 0, ioapic_id, 0x17);
  31         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 1, ioapic_id, 0x13);
  32         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 2, ioapic_id, 0x12);
  33         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1d, 3, ioapic_id, 0x10);
  34         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1b, 0, ioapic_id, 0x10);
  35         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1c, 0, ioapic_id, 0x10);
  36         smp_write_pci_intsrc(mc, mp_INT, 0x0, 0x1c, 1, ioapic_id, 0x11);
  37
  38         /* Firewire 4:0.0 */
  39         smp_write_pci_intsrc(mc, mp_INT, 0x4, 0x00, 0, ioapic_id, 0x10);
  40
  41         /* Old riser card */
  42         // riser slot top 5:8.0
  43         smp_write_pci_intsrc(mc, mp_INT, 0x5, 0x08, 0, ioapic_id, 0x14);
  44         // riser slot middle 5:9.0
  45         smp_write_pci_intsrc(mc, mp_INT, 0x5, 0x09, 0, ioapic_id, 0x15);
  46         // riser slot bottom 5:a.0
  47         smp_write_pci_intsrc(mc, mp_INT, 0x5, 0x0a, 0, ioapic_id, 0x16);
  48
  49         /* New Riser Card */
  50         smp_write_pci_intsrc(mc, mp_INT, 0x5, 0x0c, 0, ioapic_id, 0x14);
  51         smp_write_pci_intsrc(mc, mp_INT, 0x5, 0x0d, 0, ioapic_id, 0x15);
  52         smp_write_pci_intsrc(mc, mp_INT, 0x5, 0x0e, 0, ioapic_id, 0x16);
  53
  54         /* Onboard Ethernet */
  55         smp_write_pci_intsrc(mc, mp_INT, 0x1, 0x00, 0, ioapic_id, 0x10);
  56
  57         /* Local Ints:  Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
  58         mptable_lintsrc(mc, isa_bus);
  59
  60         /* Compute the checksums */
  61         return mptable_finalize(mc);
  62 }
  63
  64 unsigned long write_smp_table(unsigned long addr)
  65 {
  66         void *v;
  67         v = smp_write_floating_table(addr, 0);
  68         return (unsigned long)smp_write_config_table(v);
  69 }