src/mainboard/intel/dcp847ske/early_southbridge.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <bootblock_common.h>
   4 #include <stdint.h>
   5 #include <northbridge/intel/sandybridge/raminit_native.h>
   6 #include <southbridge/intel/bd82x6x/pch.h>
   7
   8 #include "superio.h"
   9 #include "thermal.h"
  10
  11 static const u16 hwm_initvals[] = {
  12         HWM_BANK(0),
  13         HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */
  14
  15         HWM_BANK(7), /* PECI */
  16         HWM_INITVAL(0x01, 0x95), /* Enable PECI */
  17         HWM_INITVAL(0x03, 0x10), /* Enable Agent 0 */
  18         /*
  19          * PECI temperatures are negative, going up to 0.
  20          * 0 represents the maximum allowable junction temperature, Tjmax.
  21          * There is also Tcontrol, which is the temperature at which the
  22          * system cooling should run at full speed.
  23          * Since the NCT5577D fan control only supports positive values,
  24          * Tbase0 is used as an offset.
  25          */
  26         HWM_INITVAL(0x09, CRITICAL_TEMPERATURE), /* Tbase0 */
  27
  28         HWM_BANK(2), /* CPUFAN control */
  29         HWM_INITVAL(0x00, 0x0c), /* PECI Agent 0 as CPUFAN monitoring source */
  30         HWM_INITVAL(0x01, 50),   /* Target temperature */
  31         HWM_INITVAL(0x02, 0x40), /* Enable Smart Fan IV mode */
  32         HWM_INITVAL(0x03, 0x01), /* Step-up time */
  33         HWM_INITVAL(0x04, 0x01), /* Step-down time */
  34         HWM_INITVAL(0x05, 0x10), /* Stop PWM value */
  35         HWM_INITVAL(0x06, 0x20), /* Start PWM value */
  36         HWM_INITVAL(0x21, 45),   /* Smart Fan IV Temp1 */
  37         HWM_INITVAL(0x22, 46),   /* Smart Fan IV Temp2 */
  38         HWM_INITVAL(0x23, 47),   /* Smart Fan IV Temp3 */
  39         HWM_INITVAL(0x24, PASSIVE_TEMPERATURE), /* Smart Fan IV Temp4 */
  40         HWM_INITVAL(0x27, 0x01), /* Smart Fan IV PWM1 */
  41         HWM_INITVAL(0x28, 0x02), /* Smart Fan IV PWM2 */
  42         HWM_INITVAL(0x29, 0x03), /* Smart Fan IV PWM3 */
  43         HWM_INITVAL(0x2a, 0xff), /* Smart Fan IV PWM4 */
  44         /* Smart Fan IV Critical temp */
  45         HWM_INITVAL(0x35, CRITICAL_TEMPERATURE),
  46         HWM_INITVAL(0x38, 3),    /* Smart Fan IV Critical temp tolerance */
  47         HWM_INITVAL(0x39, 0x81), /* Enable SYSTIN weight value */
  48         HWM_INITVAL(0x3a, 1),    /* SYSTIN temperature step */
  49         HWM_INITVAL(0x3b, 2),    /* SYSTIN step tolerance */
  50         HWM_INITVAL(0x3c, 1),    /* SYSTIN weight step */
  51         HWM_INITVAL(0x3d, 40),   /* SYSTIN temperature base */
  52         HWM_INITVAL(0x3e, 0x00), /* SYSTIN fan duty base */
  53
  54         HWM_BANK(0),
  55 };
  56
  57 static void hwm_init(void)
  58 {
  59         /* Set up fan control */
  60         for (int i = 0; i < ARRAY_SIZE(hwm_initvals); i++)
  61                 HWM_WRITE_INITVAL(hwm_initvals[i]);
  62 }
  63
  64 static const u16 superio_initvals[] = {
  65         /* Global config registers */
  66         SUPERIO_INITVAL(0x1a, 0x02),
  67         SUPERIO_INITVAL(0x1b, 0x6a),
  68         SUPERIO_INITVAL(0x27, 0x80),
  69 #if CONFIG(DISABLE_UART_ON_TESTPADS)
  70         SUPERIO_INITVAL(0x2a, 0x80),
  71 #else
  72         SUPERIO_INITVAL(0x2a, 0x00),
  73 #endif
  74         SUPERIO_INITVAL(0x2c, 0x00),
  75
  76         SUPERIO_BANK(2), /* UART A */
  77         SUPERIO_INITVAL(0x30, 0x01),
  78         SUPERIO_INITVAL(0x60, 0x03),
  79         SUPERIO_INITVAL(0x61, 0xf8),
  80         SUPERIO_INITVAL(0x70, 0x04),
  81
  82         SUPERIO_BANK(7), /* GPIO config */
  83         SUPERIO_INITVAL(0x30, 0x01),
  84         SUPERIO_INITVAL(0xe0, 0xcf),
  85         SUPERIO_INITVAL(0xe1, 0x0f),
  86         SUPERIO_INITVAL(0xe4, 0xed),
  87         SUPERIO_INITVAL(0xe5, 0x4d),
  88         SUPERIO_INITVAL(0xec, 0x30),
  89         SUPERIO_INITVAL(0xee, 0xff),
  90
  91         SUPERIO_BANK(8),
  92         SUPERIO_INITVAL(0x30, 0x0a),
  93         SUPERIO_INITVAL(0x60, GPIO_PORT >> 8),
  94         SUPERIO_INITVAL(0x61, GPIO_PORT & 0xff),
  95
  96         SUPERIO_BANK(9),
  97         SUPERIO_INITVAL(0x30, 0x8c),
  98         SUPERIO_INITVAL(0xe1, 0x90),
  99
 100         SUPERIO_BANK(0xa),
 101         SUPERIO_INITVAL(0xe4, 0x20),
 102         SUPERIO_INITVAL(0xe6, 0x4c),
 103
 104         SUPERIO_BANK(0xb), /* HWM & LED */
 105         SUPERIO_INITVAL(0x30, 0x01),
 106         SUPERIO_INITVAL(0x60, HWM_PORT >> 8),
 107         SUPERIO_INITVAL(0x61, HWM_PORT & 0xff),
 108         SUPERIO_INITVAL(0xf7, 0x67),
 109         SUPERIO_INITVAL(0xf8, 0x60),
 110
 111         SUPERIO_BANK(0x16),
 112         SUPERIO_INITVAL(0x30, 0x00),
 113 };
 114
 115 static void superio_init(void)
 116 {
 117         SUPERIO_UNLOCK;
 118         for (int i = 0; i < ARRAY_SIZE(superio_initvals); i++)
 119                 SUPERIO_WRITE_INITVAL(superio_initvals[i]);
 120         SUPERIO_LOCK;
 121 }
 122
 123 void bootblock_mainboard_early_init(void)
 124 {
 125         superio_init();
 126         hwm_init();
 127 }
 128
 129 void mainboard_get_spd(spd_raw_data *spd, bool id_only)
 130 {
 131         read_spd(&spd[0], 0x50, id_only);
 132         read_spd(&spd[2], 0x51, id_only);
 133 }
 134
 135 const struct southbridge_usb_port mainboard_usb_ports[] = {
 136 #define USB_CONFIG(enabled, current, ocpin) { enabled, current, ocpin }
 137 #include "usb.h"
 138 };