src/mainboard/intel/dg41wv/early_init.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <bootblock_common.h>
   4 #include <device/pnp_ops.h>
   5 #include <northbridge/intel/x4x/x4x.h>
   6 #include <southbridge/intel/i82801gx/i82801gx.h>
   7 #include <superio/winbond/common/winbond.h>
   8 #include <superio/winbond/w83627dhg/w83627dhg.h>
   9
  10 #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
  11
  12 void bootblock_mainboard_early_init(void)
  13 {
  14         /* Set GPIOs on superio, enable UART */
  15         pnp_enter_ext_func_mode(SERIAL_DEV);
  16         pnp_set_logical_device(SERIAL_DEV);
  17
  18         pnp_write_config(SERIAL_DEV, 0x2c, 0x13);
  19
  20         pnp_exit_ext_func_mode(SERIAL_DEV);
  21
  22         winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  23
  24         /* IRQ routing */
  25         RCBA16(D31IR) = 0x0132;
  26         RCBA16(D29IR) = 0x0237;
  27 }
  28
  29 void mb_get_spd_map(u8 spd_map[4])
  30 {
  31         spd_map[0] = 0x50;
  32         spd_map[2] = 0x52;
  33 }