1 chip soc
/intel
/jasperlake
3 device cpu_cluster
0 on
end
6 # Note that GPE events called out in ASL code rely on this
7 # route. i.e.
If this route changes
then the affected GPE
8 # offset bits also need
to be changed.
9 register
"pmc_gpe0_dw0" = "GPP_B"
10 register
"pmc_gpe0_dw1" = "GPP_H"
11 register
"pmc_gpe0_dw2" = "GPP_E"
14 register
"SaGv" = "SaGv_Enabled"
15 register
"SmbusEnable" = "1"
16 register
"ScsEmmcHs400Enabled" = "1"
17 register
"SdCardPowerEnableActiveHigh" = "1"
19 # Display related UPDs
20 #
Select eDP
for port A
(1 = eDP
, 2 = MIPI
)
21 register
"DdiPortAConfig" = "1"
23 # Enable HPD
for DDI ports B
/C
24 register
"DdiPortBHpd" = "1"
25 register
"DdiPortCHpd" = "1"
27 # Enable DDC
for DDI ports B
/C
28 register
"DdiPortBDdc" = "1"
29 register
"DdiPortCDdc" = "1"
31 register
"usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" #
Type-C Port1
32 register
"usb2_ports[1]" = "USB2_PORT_MID(OC2)" # USB2
Type A port1
33 register
"usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" #
Type-C Port2
34 register
"usb2_ports[3]" = "USB2_PORT_MID(OC0)" # USB2
Type A port2
35 register
"usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # USB2 Bluetooth
36 register
"usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # USB2 WWAN
37 register
"usb2_ports[6]" = "USB2_PORT_MID(OC2)" # USB2
Type A port3
38 register
"usb2_ports[7]" = "USB2_PORT_MID(OC3)" # USB2
Type A port4
40 register
"usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" #
Type-C Port1
41 register
"usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" #
Type-C Port2
42 register
"usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3
/2 Type A port1
43 register
"usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # USB3 WWAN
44 register
"usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # UNUSED
45 register
"usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # UNUSED
48 register
"pch_isclk" = "1"
50 # EC host command ranges are in
0x800-0x8ff & 0x200-0x20f
51 register
"gen1_dec" = "0x00fc0801"
52 register
"gen2_dec" = "0x000c0201"
53 # EC memory map range is
0x900-0x9ff
54 register
"gen3_dec" = "0x00fc0901"
56 # Skip the CPU replacement check
57 register
"SkipCpuReplacementCheck" = "1"
59 register
"PchHdaDspEnable" = "1"
60 register
"PchHdaAudioLinkHdaEnable" = "0"
61 register
"PchHdaAudioLinkSspEnable[0]" = "1"
62 register
"PchHdaAudioLinkSspEnable[1]" = "1"
63 register
"PchHdaAudioLinkDmicEnable[0]" = "1"
64 register
"PchHdaAudioLinkDmicEnable[1]" = "1"
66 # PCIe port
1 for M
.2 E
-key WLAN
67 # Enable Root Port
4(x4
) for NVMe
68 register
"PcieRpEnable[1]" = "1"
69 register
"PcieRpEnable[4]" = "1"
71 # Enable ClkReqDetect
1 for WLAN
72 # Enable ClkReqDetect
4 for NVMe
73 register
"PcieRpClkReqDetect[1]" = "1"
74 register
"PcieRpClkReqDetect[4]" = "1"
76 register
"PcieClkSrcUsage[0]" = "0x04"
77 register
"PcieClkSrcUsage[1]" = "0x01"
78 register
"PcieClkSrcUsage[2]" = "0xFF"
79 register
"PcieClkSrcUsage[3]" = "0xFF"
80 register
"PcieClkSrcUsage[4]" = "0xFF"
81 register
"PcieClkSrcUsage[5]" = "0xFF"
83 register
"PcieClkSrcClkReq[0]" = "0x00"
84 register
"PcieClkSrcClkReq[1]" = "0x01"
85 register
"PcieClkSrcClkReq[2]" = "0x02"
86 register
"PcieClkSrcClkReq[3]" = "0x03"
87 register
"PcieClkSrcClkReq[4]" = "0x04"
88 register
"PcieClkSrcClkReq[5]" = "0x05"
90 register
"SerialIoI2cMode" = "{
91 [PchSerialIoIndexI2C0] = PchSerialIoPci,
92 [PchSerialIoIndexI2C1] = PchSerialIoDisabled,
93 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
94 [PchSerialIoIndexI2C3] = PchSerialIoDisabled,
95 [PchSerialIoIndexI2C4] = PchSerialIoPci,
96 [PchSerialIoIndexI2C5] = PchSerialIoPci,
99 register
"SerialIoGSpiMode" = "{
100 [PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
101 [PchSerialIoIndexGSPI1] = PchSerialIoPci,
102 [PchSerialIoIndexGSPI2] = PchSerialIoDisabled,
105 register
"SerialIoGSpiCsMode" = "{
106 [PchSerialIoIndexGSPI0] = 1,
107 [PchSerialIoIndexGSPI1] = 1,
108 [PchSerialIoIndexGSPI2] = 1,
111 register
"SerialIoGSpiCsState" = "{
112 [PchSerialIoIndexGSPI0] = 0,
113 [PchSerialIoIndexGSPI1] = 0,
114 [PchSerialIoIndexGSPI2] = 0,
117 register
"SerialIoUartMode" = "{
118 [PchSerialIoIndexUART0] = PchSerialIoDisabled,
119 [PchSerialIoIndexUART1] = PchSerialIoDisabled,
120 [PchSerialIoIndexUART2] = PchSerialIoSkipInit,
124 register
"dptf_enable" = "1"
126 # Add PL1
and PL2 values
127 register
"power_limits_config" = "{
128 .tdp_pl1_override = 6,
129 .tdp_pl2_override = 20,
133 register
"s0ix_enable" = "1"
135 # GPIO
for SD card detect
136 register
"sdcard_cd_gpio" = "VGPIO_39"
138 register
"common_soc_config" = "{
144 .speed = I2C_SPEED_FAST,
146 .speed = I2C_SPEED_FAST,
153 .speed = I2C_SPEED_FAST,
156 .speed = I2C_SPEED_FAST,
160 #
Set the minimum assertion width
161 register
"PchPmSlpS3MinAssert" = "3" #
50ms
162 register
"PchPmSlpS4MinAssert" = "1" #
1s
163 register
"PchPmSlpSusMinAssert" = "3" #
1s
164 register
"PchPmSlpAMinAssert" = "3" #
98ms
166 # NOTE
: Duration programmed in the below register should never be smaller than the
167 # stretch duration programmed in the following registers
-
168 #
- GEN_PMCON_A.SLP_S3_MIN_ASST_WDTH
(PchPmSlpS3MinAssert
)
169 #
- GEN_PMCON_A.S4MAW
(PchPmSlpS4MinAssert
)
170 #
- PM_CFG.SLP_A_MIN_ASST_WDTH
(PchPmSlpAMinAssert
)
171 #
- PM_CFG.SLP_LAN_MIN_ASST_WDTH
172 register
"PchPmPwrCycDur" = "1" #
1s
174 #
Set xHCI LFPS period sampling off time
, the default is
9ms.
175 register
"xhci_lfps_sampling_offtime_ms" = "9"
178 device pci
00.0 on
end # Host Bridge
179 device pci
02.0 on
end # Integrated Graphics Device
181 chip drivers
/intel
/dptf
182 register
"policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 1000)"
183 register
"policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)"
185 register
"controls.power_limits.pl1" = "{
188 .time_window_min = 1 * MSECS_PER_SEC,
189 .time_window_max = 1 * MSECS_PER_SEC,
190 .granularity = 200,}"
191 register
"controls.power_limits.pl2" = "{
194 .time_window_min = 1 * MSECS_PER_SEC,
195 .time_window_max = 1 * MSECS_PER_SEC,
196 .granularity = 1000,}"
197 device generic
0 on
end
199 end # SA Thermal device
202 chip drivers
/intel
/mipi_camera
203 register
"acpi_uid" = "0x50000"
204 register
"acpi_name" = ""IPU0
""
205 register
"device_type" = "INTEL_ACPI_CAMERA_CIO2"
207 register
"cio2_num_ports" = "2"
208 register
"cio2_lanes_used" = "{2,2}"
209 register
"cio2_lane_endpoint[0]" = ""^I2C4.CAM0
""
210 register
"cio2_lane_endpoint[1]" = ""^I2C5.CAM1
""
211 register
"cio2_prt[0]" = "0"
212 register
"cio2_prt[1]" = "2"
213 device generic
0 on
end
216 device pci
12.0 off
end # Thermal Subsystem
217 device pci
12.5 off
end # UFS SCS
218 device pci
12.6 off
end # GSPI #
2
220 chip drivers
/usb
/acpi
221 register
"desc" = ""Root Hub
""
222 register
"type" = "UPC_TYPE_HUB"
224 chip drivers
/usb
/acpi
225 register
"desc" = ""USB3
/2 Type-A Left Lower
""
226 register
"type" = "UPC_TYPE_A"
227 device usb
2.0 on
end
229 chip drivers
/usb
/acpi
230 register
"desc" = ""WWAN
""
231 register
"type" = "UPC_TYPE_INTERNAL"
232 device usb
2.1 on
end
234 chip drivers
/usb
/acpi
235 register
"desc" = ""Bluetooth
""
236 register
"type" = "UPC_TYPE_INTERNAL"
237 device usb
2.2 on
end
239 chip drivers
/usb
/acpi
240 register
"desc" = ""USB C Connector
1""
241 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
242 device usb
2.3 on
end
244 chip drivers
/usb
/acpi
245 register
"desc" = ""USB C Connector
2""
246 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
247 device usb
2.4 on
end
249 chip drivers
/usb
/acpi
250 register
"desc" = ""USB C Connector
3""
251 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
252 device usb
2.5 on
end
254 chip drivers
/usb
/acpi
255 register
"desc" = ""USB C Connector
4""
256 register
"type" = "UPC_TYPE_C_USB2_SS_SWITCH"
257 device usb
2.6 on
end
259 chip drivers
/usb
/acpi
260 register
"desc" = ""USB3
/2 Type-A Left Upper
""
261 register
"type" = "UPC_TYPE_A"
262 device usb
2.7 on
end
264 chip drivers
/usb
/acpi
265 register
"desc" = ""USB3
/2 Type-A Left Lower
""
266 register
"type" = "UPC_TYPE_A"
267 device usb
3.0 on
end
269 chip drivers
/usb
/acpi
270 register
"desc" = ""USB3
/2 Type-A Left Upper
""
271 register
"type" = "UPC_TYPE_A"
272 device usb
3.1 on
end
274 chip drivers
/usb
/acpi
275 register
"desc" = ""WLAN
""
276 register
"type" = "UPC_TYPE_INTERNAL"
277 device usb
3.2 on
end
279 chip drivers
/usb
/acpi
280 register
"desc" = ""USB3 Port Unused1
""
281 register
"type" = "UPC_TYPE_INTERNAL"
282 device usb
3.3 on
end
284 chip drivers
/usb
/acpi
285 register
"desc" = ""USB3 Port Unused2
""
286 register
"type" = "UPC_TYPE_INTERNAL"
287 device usb
3.4 on
end
289 chip drivers
/usb
/acpi
290 register
"desc" = ""USB3 Port Unused3
""
291 register
"type" = "UPC_TYPE_INTERNAL"
292 device usb
3.5 on
end
297 device pci
14.1 off
end # USB xDCI
(OTG
)
298 device pci
14.2 off
end # PMC SRAM
300 chip drivers
/wifi
/generic
301 register
"wake" = "GPE0_PME_B0"
302 device generic
0 on
end
305 device pci
14.5 on
end # SDCard
307 chip drivers
/i2c
/max98373
308 register
"vmon_slot_no" = "4"
309 register
"imon_slot_no" = "5"
311 register
"desc" = ""RIGHT SPEAKER AMP
""
312 register
"name" = ""MAXR
""
315 chip drivers
/i2c
/max98373
316 register
"vmon_slot_no" = "6"
317 register
"imon_slot_no" = "7"
319 register
"desc" = ""LEFT SPEAKER AMP
""
320 register
"name" = ""MAXL
""
323 chip drivers
/i2c
/da7219
324 register
"irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
325 register
"btn_cfg" = "50"
326 register
"mic_det_thr" = "500"
327 register
"jack_ins_deb" = "20"
328 register
"jack_det_rate" = ""32ms_64ms
""
329 register
"jack_rem_deb" = "1"
330 register
"a_d_btn_thr" = "0xa"
331 register
"d_b_btn_thr" = "0x16"
332 register
"b_c_btn_thr" = "0x21"
333 register
"c_mic_btn_thr" = "0x3e"
334 register
"btn_avg" = "4"
335 register
"adc_1bit_rpt" = "1"
336 register
"micbias_lvl" = "2600"
337 register
"mic_amp_in_sel" = ""diff
""
341 device pci
15.1 off
end # I2C #
1
342 device pci
15.2 off
end # I2C #
2
343 device pci
15.3 off
end # I2C #
3
344 device pci
16.0 on
end # Management Engine Interface
1
345 device pci
16.1 off
end # Management Engine Interface
2
346 device pci
16.2 off
end # Management Engine IDE
-R
347 device pci
16.3 off
end # Management Engine KT Redirection
348 device pci
16.4 off
end # Management Engine Interface
3
349 device pci
16.5 off
end # Management Engine Interface
4
350 device pci
17.0 off
end # SATA
351 device pci
19.0 on # I2C #
4 Cam
0
352 chip drivers
/intel
/mipi_camera
353 register
"acpi_hid" = ""OVTI2740
""
354 register
"acpi_uid" = "0"
355 register
"acpi_name" = ""CAM0
""
356 register
"chip_name" = ""Ov
2740 Camera
""
357 register
"device_type" = "INTEL_ACPI_CAMERA_SENSOR"
358 register
"has_power_resource" = "1"
360 register
"ssdb.lanes_used" = "2"
361 register
"num_freq_entries" = "1"
362 register
"link_freq[0]" = "360000000"
363 register
"remote_name" = ""IPU0
""
366 register
"clk_panel.clks[0].clknum" = "0" #IMGCLKOUT_3
367 register
"clk_panel.clks[0].freq" = "1" #
19.2 Mhz
369 register
"gpio_panel.gpio[0].gpio_num" = "GPP_D5" #reset
370 register
"gpio_panel.gpio[1].gpio_num" = "GPP_B14" #power
373 register
"on_seq.ops_cnt" = "4"
374 register
"on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
375 register
"on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
376 register
"on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
377 register
"on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
380 register
"off_seq.ops_cnt" = "3"
381 register
"off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
382 register
"off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
383 register
"off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
388 device pci
19.1 on # I2C #
5 Cam
1 and VCM
389 chip drivers
/intel
/mipi_camera
390 register
"acpi_hid" = ""OVTI5675
""
391 register
"acpi_uid" = "0"
392 register
"acpi_name" = ""CAM1
""
393 register
"chip_name" = ""Ov
5675 Camera
""
394 register
"device_type" = "INTEL_ACPI_CAMERA_SENSOR"
396 register
"ssdb.lanes_used" = "2"
397 register
"ssdb.link_used" = "1"
398 register
"ssdb.vcm_type" = "0x0C"
399 register
"vcm_name" = ""VCM0
""
400 register
"num_freq_entries" = "1"
401 register
"link_freq[0]" = "DEFAULT_LINK_FREQ"
402 register
"remote_name" = ""IPU0
""
404 register
"has_power_resource" = "1"
406 register
"clk_panel.clks[0].clknum" = "1" #IMGCLKOUT_3
407 register
"clk_panel.clks[0].freq" = "1" #
19.2 Mhz
409 register
"gpio_panel.gpio[0].gpio_num" = "GPP_D4" #power_enable
410 register
"gpio_panel.gpio[1].gpio_num" = "GPP_C19" #reset
413 register
"on_seq.ops_cnt" = "4"
414 register
"on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
415 register
"on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
416 register
"on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
417 register
"on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
420 register
"off_seq.ops_cnt" = "3"
421 register
"off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
422 register
"off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
423 register
"off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
427 chip drivers
/intel
/mipi_camera
428 register
"acpi_hid" = "ACPI_DT_NAMESPACE_HID"
429 register
"acpi_uid" = "3"
430 register
"acpi_name" = ""VCM0
""
431 register
"chip_name" = ""DW AF DAC
""
432 register
"device_type" = "INTEL_ACPI_CAMERA_VCM"
434 register
"pr0" = ""\\_SB.PCI0.I2C5.CAM1.PRIC
""
435 register
"vcm_compat" = ""dongwoon
,dw9714
""
437 register
"ssdb.lanes_used" = "2"
438 register
"num_freq_entries" = "1"
439 register
"link_freq[0]" = "DEFAULT_LINK_FREQ"
440 register
"remote_name" = ""IPU0
""
445 device pci
19.2 on
end # UART #
2
446 device pci
1a
.0 on
end # eMMC
447 device pci
1c
.0 off
end # PCI Express Port
1
448 device pci
1c
.1 on
end # PCI Express Port
2 - WLAN
449 device pci
1c
.2 off
end # PCI Express Port
3
450 device pci
1c
.3 off
end # PCI Express Port
4
451 device pci
1c
.4 on
end # PCI Express Port
5 - NVMe
452 device pci
1c
.5 off
end # PCI Express Port
6
453 device pci
1c
.6 off
end # PCI Express Port
7
454 device pci
1c
.7 off
end # PCI Express Port
8
455 device pci
1e
.0 on
end # UART #
0
456 device pci
1e
.1 off
end # UART #
1
457 device pci
1e
.2 off
end # GSPI #
0
459 chip drivers
/spi
/acpi
460 register
"hid" = "ACPI_DT_NAMESPACE_HID"
461 register
"compat_string" = ""google
,cr50
""
462 register
"irq" = "ACPI_IRQ_EDGE_LOW(GPP_H13_IRQ)"
466 device pci
1f
.0 on
end # eSPI Interface
467 device pci
1f
.1 on
end # P2SB
468 device pci
1f
.2 hidden
end # Power Management Controller
469 device pci
1f
.3 on
end # Intel HDA
470 device pci
1f
.4 on
end # SMBus
471 device pci
1f
.5 on
end # PCH SPI
472 device pci
1f
.6 off
end # GbE