1 chip soc
/intel
/broadwell
3 # Enable DisplayPort
1 Hotplug with
6ms pulse
4 register
"gpu_dp_d_hotplug" = "0x06"
6 # Enable DisplayPort
0 Hotplug with
6ms pulse
7 register
"gpu_dp_c_hotplug" = "0x06"
9 # Enable DVI Hotplug with
6ms pulse
10 register
"gpu_dp_b_hotplug" = "0x06"
12 device cpu_cluster
0 on
13 chip cpu
/intel
/haswell
15 device lapic
0xacac off
end
19 device pci
00.0 on
end # host bridge
20 device pci
02.0 on
end # vga controller
21 device pci
03.0 on
end # mini
-hd audio
23 chip soc
/intel
/broadwell
/pch
24 register
"alt_gp_smi_en" = "0x0000"
25 register
"gpe0_en_1" = "0x00000400"
26 register
"gpe0_en_2" = "0x00000000"
27 register
"gpe0_en_3" = "0x00000000"
28 register
"gpe0_en_4" = "0x00000000"
30 register
"sata_port_map" = "0x2"
31 register
"sio_acpi_mode" = "1"
33 device pci
13.0 off
end # Smart Sound Audio DSP
34 device pci
14.0 on
end # USB3 XHCI
35 device pci
15.0 on
end # Serial I
/O DMA
36 device pci
15.1 on
end # I2C0
37 device pci
15.2 on
end # I2C1
38 device pci
15.3 off
end # GSPI0
39 device pci
15.4 off
end # GSPI1
40 device pci
15.5 off
end # UART0
41 device pci
15.6 off
end # UART1
42 device pci
16.0 on
end # Management Engine Interface
1
43 device pci
16.1 off
end # Management Engine Interface
2
44 device pci
16.2 off
end # Management Engine IDE
-R
45 device pci
16.3 off
end # Management Engine KT
46 device pci
17.0 off
end # SDIO
47 device pci
19.0 off
end # GbE
48 device pci
1b
.0 on
end # High Definition Audio
49 device pci
1c
.0 on
end # PCIe Port #
1
50 device pci
1c
.1 on
end # PCIe Port #
2
51 device pci
1c
.2 on
end # PCIe Port #
3
52 device pci
1c
.3 on
end # PCIe Port #
4
53 device pci
1c
.4 on
end # PCIe Port #
5
54 device pci
1c
.5 on
end # PCIe Port #
6
55 device pci
1d
.0 off
end # USB2 EHCI
56 device pci
1e
.0 off
end # PCI bridge
57 device pci
1f
.0 on
end # LPC bridge
58 device pci
1f
.2 on
end # SATA Controller
59 device pci
1f
.3 on
end # SMBus
60 device pci
1f
.6 on
end # Thermal
